# US 2014/0208185 A1 · Rate adaptive irregular qc-ldpc codes from pairwise balanced designs for ultra-high-speed optical transports

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- Number: US 2014/0208185 A1
- Document ID: US20140208185A1
- Status: Published application
- Kind: A1
- Application number: 14/162,951
- Filed: 2014-01-24
- Published: 2014-07-24
- Earliest claimed: 2013-01-24
- Assignees: NEC Laboratories America, Inc.
- Applicants: NEC Laboratories America, Inc.
- Inventors: Ivan B. DJORDJEVIC; Ting WANG
- Web page: https://patentgrep.com/patent/US20140208185A1

## CPC

- G06F 11/10: Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- H03M 13/033: {Theoretical methods to calculate these checking codes}
- H03M 13/112: {with correction functions for the min-sum rule, e.g. using an offset or a scaling factor}
- H03M 13/116: {Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices}
- H03M 13/1171: {Parity-check or generator matrices with non-binary elements, e.g. for non-binary LDPC codes}
- H03M 13/1177: {Regular LDPC codes with parity-check matrices wherein all rows and columns have the same row weight and column weight, respectively}
- H03M 13/255: {with Low Density Parity Check [LDPC] codes}
- H04L 1/0009: {by adapting the channel coding (H04L1/1812 takes precedence)}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

Systems and methods for data transport include encoding one or more streams of input data using one or more Quasi-Cyclic Low Density Parity Check (QC-LDPC) encoders; controlling irregularity of the QC-LDPC encoded data while preserving the quasi-cyclic nature of the LDPC encoded data and eliminating the error floor phenomenon. A parity-check matrix may be partially reconfigured to adapt one or more code rates; and one or more signals are generated using a mapper, wherein the output of the mapper is modulated onto a transmission medium. One or more streams of input data are received, and the streams are decoded using one or more QC-LDPC decoders.

## Claims

### Claim 1

A method for data transport, comprising:
encoding one or more streams of input data using one or more Quasi-Cyclic Low Density Parity Check (QC-LDPC) encoders;
controlling irregularity of the QC-LDPC encoded data while preserving the quasi-cyclic nature of the LDPC encoded data and eliminating the error floor phenomenon;
partially reconfiguring a parity check matrix to adapt one or more code rates;
generating one or more signals using a mapper, wherein the output of the mapper is modulated onto a transmission medium;
receiving the one or more streams of input data; and
decoding the one or more streams of input data using one or more QC-LDPC decoders.

### Claim 2 (depends on 1)

The method as recited in claim 1, further comprising employing Pairwise Balanced Designs (PBD) to control the irregularity of the QC-LDPC encoded data.

### Claim 3 (depends on 1)

The method as recited in claim 1, wherein the partial reconfiguration of the parity check matrix includes at least one of changing the size of a permutation matrix and varying the number of employed block-rows, wherein the code word length is fixed.

### Claim 4 (depends on 1)

The method as recited in claim 1, wherein the partial reconfiguration of the parity check matrix includes maintaining a same regular parity-check matrix as a template while employing Pairwise Balanced Designs (PBDs) corresponding to different code rates.

### Claim 5 (depends on 1)

The method as recited in claim 1, wherein the partial reconfiguration of the parity check matrix includes employing a min-sum-plus-correction-term method in decoding to improve the Bit Error Rate (BER) performance.

### Claim 6 (depends on 1)

The method as recited in claim 1, wherein the transmission medium is one or more of single-mode fiber (SMF), few-mode fiber (FMF), few-core fiber (FCF), and few-mode-few-core fiber (FMFCF).

### Claim 7 (depends on 1)

The method as recited in claim 1, wherein the Quasi-Cyclic Low Density Parity Check (QC-LDPC) encoders are one of binary or non-binary QC-LDPC encoders.

### Claim 8

A system for data transport, comprising:
one or more encoders configured to encode one or more streams of input data using one or more Quasi-Cyclic Low Density Parity Check (QC-LDPC) encoders;
an irregularity control module configured to control irregularity of the QC-LDPC encoded data while preserving the quasi-cyclic nature of the LDPC encoded data and eliminating the error floor phenomenon;
one or more decoders configured to partially reconfigure a parity check matrix to adapt one or more code rates;
one or more mappers configured to generate one or more signals, wherein the output of the mapper is modulated onto a transmission medium;
a receiver configured to receive the one or more streams of input data; and
decoding the one or more streams of input data using one or more QC-LDPC decoders.

### Claim 9 (depends on 8)

The system as recited in claim 8, further comprising employing Pairwise Balanced Designs (PBDs) to control the irregularity of the QC-LDPC encoded data.

### Claim 10 (depends on 8)

The system as recited in claim 8, wherein the partial reconfiguration of the parity check matrix includes at least one of changing the size of a permutation matrix and varying the number of employed block-rows, wherein the code word length is fixed.

### Claim 11 (depends on 8)

The system as recited in claim 8, wherein the partial reconfiguration of the parity check matrix includes maintaining a same regular parity-check matrix as a template while employing Pairwise Balanced Designs (PBDs) corresponding to different code rates.

### Claim 12 (depends on 8)

The system as recited in claim 8, wherein the partial reconfiguration of the parity check matrix includes employing a min-sum-plus-correction-term method to improve the Bit Error Rate (BER) performance.

### Claim 13 (depends on 8)

The system as recited in claim 8, wherein the transmission medium is one or more of single-mode fiber (SMF), few-mode fiber (FMF), few-core fiber (FCF), and few-mode-few-core fiber (FMFCF).

### Claim 14 (depends on 8)

The system as recited in claim 8, wherein the Quasi-Cyclic Low Density Parity Check (QC-LDPC) encoders are binary or non-binary QC-LDPC encoders.