# US 2014/0208151 A1 · Method And Apparatus To Recover From An Erroneous Logic State In An Electronic System

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- Number: US 2014/0208151 A1
- Document ID: US20140208151A1
- Status: Published application
- Kind: A1
- Application number: 13/747,870
- Filed: 2013-01-23
- Published: 2014-07-24
- Earliest claimed: 2013-01-23
- Assignees: Allegro MicroSystems, LLC
- Inventors: Devon Fernandez
- Web page: https://patentgrep.com/patent/US20140208151A1

## CPC

- G06F 11/08: Error detection or correction by redundancy in data representation, e.g. by using checking codes
- B60G 17/0185: for failure detection
- G05B 19/045: using logic state machines, consisting only of a memory or a programmable logic device containing the logic for the controlled machine and in which the state of its outputs is dependent on the state of its inputs or part of its own output states, e.g. binary decision controllers, finite state controllers
- G05B 19/4063: Monitoring general control system (G05B19/4062 takes precedence)
- G06F 11/0793: {Remedial or corrective actions (recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40)}
- G06F 11/0796: {Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element}
- G06F 11/102: {Error in check bits}
- G06F 11/1032: {Simple parity}
- H03K 19/00392: {by circuit redundancy (H03K19/0075 takes precedence)}
- H03K 19/007: Fail-safe circuits
- H03K 17/24: Storing the actual state when the supply voltage fails
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- B60G: VEHICLE SUSPENSION ARRANGEMENTS (air-cushion vehicles B60V; {cycle suspensions B62K25/00})
- G05B: CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS (systems for controlling or regulating non-electric variables G05D; systems for regulating electric or magnetic variables G05F; control devices or systems insofar as characterised by mechanical features only G05G)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

An electronic system includes circuitry to detect errors in logic state in the system and to initiate corrective action when one or more errors are detected. In some embodiments, redundant information is stored within a system that is associated with an operational state of the system. If the operational state of the system is subsequently corrupted as a result of an electrical or mechanical overstress condition, resulting errors may be detected by comparing or otherwise processing the stored operational state information and the redundant information.

## Claims

### Claim 1

An electronic system, comprising:
first digital storage circuitry to store a current operational state of the electronic system;
operational logic to determine a next operational state of the electronic system based, at least in part, on an input signal;
redundancy logic to generate redundant information associated with the next operational state determined by the operational logic;
second digital storage circuitry to store the redundant information; and
error checking logic to process the current operational state stored in the first digital storage circuitry and the redundant information stored in the second digital storage circuitry to determine whether an error in logic state exists in the electronic system, the error checking logic including correction logic to initiate corrective action for the electronic system if an error is detected by the error checking logic.

### Claim 2 (depends on 1)

The electronic system of claim 1, wherein:
the correction logic is configured to initiate a system reset of the electronic system if an error is detected by the error checking logic.

### Claim 3 (depends on 1)

The electronic system of claim 1, wherein;
the correction logic is configured to send an alert to an operator of the electronic system if an error is detected by the error checking logic.

### Claim 4 (depends on 1)

The electronic system of claim 1, wherein:
the correction logic is configured to modify the current operational state information stored in the first digital storage circuitry to a safe state that will not produce future errors in the electronic system if an error is detected by the error checking logic.

### Claim 5 (depends on 1)

The electronic system of claim 1, wherein:
the correction logic is configured to perform an error correction operation to correct the current operational state information stored in the first digital storage circuitry if an error is detected by the error checking logic.

### Claim 6 (depends on 1)

The electronic system of claim 1, wherein:
the input signal of the operational logic is derived from an output signal of at least one sensing element.

### Claim 7 (depends on 1)

The electronic system of claim 1, wherein:
the input signal of the operational logic is derived from an output signal of at least one magnetic field sensing element.

### Claim 8 (depends on 7)

The electronic system of claim 7, wherein:
the at least one magnetic field sensing element includes at least one of a Hall effect element, a magnetoresistance element, or a magnetotransistor.

### Claim 9 (depends on 1)

The electronic system of claim 1, wherein:
the redundant information generated by the redundancy logic includes a parity bit.

### Claim 10 (depends on 1)

The electronic system of claim 1, wherein:
the redundant information generated by the redundancy logic includes a checksum.

### Claim 11 (depends on 1)

The electronic system of claim 1, wherein:
the redundant information generated by the redundancy logic includes an error detection code.

### Claim 12 (depends on 1)

The electronic system of claim 1, wherein:
the redundant information generated by the redundancy logic includes an error correction code.

### Claim 13 (depends on 1)

The electronic system of claim 1, wherein:
the redundant information generated by the redundancy logic includes a full copy of the next operational state information determined by the operational logic.

### Claim 14 (depends on 1)

The electronic system of claim 1, wherein:
the operational logic includes at least one state machine.

### Claim 15 (depends on 1)

The electronic system of claim 1, wherein:
the operational logic is configured to determine the next operational state of the electronic system based on the input signal and the current operational state of the electronic system.

### Claim 16 (depends on 1)

The electronic system of claim 1, wherein:
the first digital storage circuitry is different from the second digital storage circuitry.

### Claim 17 (depends on 1)

The electronic system of claim 1, wherein:
the first digital storage circuitry includes an operational register and the second digital storage circuitry includes a redundancy register that is different from the operational register.

### Claim 18

A method for use in detecting and recovering from logic state errors in an electronic system comprising:
receiving one or more inputs signals;
processing the one or more Input signals to determine a next operational state associated with the electronic system;
storing the next operational state information;
processing the next operational state information to generate redundant information;
storing the redundant information:
processing the stored operational state information with the stored redundant information to determine whether one or more errors exist in the stored operational state information; and
initiating corrective action if one or more errors are detected in the stored operational state information.

### Claim 19 (depends on 18)

The method of claim 18, further comprising:
repeating receiving, processing the one or more input signals, storing the next operational state information, processing the next operational state information, storing the redundant information, and processing the stored operational state Information with the stored redundant information if no errors are detected in the stored operational state information.

### Claim 20 (depends on 18)

The method of claim 18, wherein:
initiating corrective action includes initiating a system reset if one or more errors are detected in the stored operational state information.

### Claim 21 (depends on 18)

The method of claim 18, wherein:
initiating corrective action includes sending an alert to an operator of the electronic system if one or more errors are detected in the stored operational state information.

### Claim 22 (depends on 18)

The method of claim 18, wherein:
initiating corrective action includes modifying the stored operational state information to a safe state that will not produce future errors in the electronic system if one or more errors are detected in the stored operational state information.

### Claim 23 (depends on 18)

The method of claim 18, wherein:
initiating corrective action includes performing an error correction operation to correct the stored operational state information if one or more errors are detected in the stored operational state information.

### Claim 24 (depends on 18)

The method of claim 18, wherein:
receiving one or more inputs signals includes receiving one or more inputs signals that are derived from an output signal of at least one sensing element.

### Claim 25 (depends on 18)

The method of claim 18, wherein:
receiving one or more inputs signals includes receiving one or more inputs signals that are derived from an output signal of at least one magnetic field sensing element, the at least one magnetic field sensing element including at least one of: a Hall effect element, a magnetoresistance element, or a magnetotransistor.

### Claim 26 (depends on 18)

The method of claim 18, wherein;
processing the next operational state information to generate redundant information includes processing the next operational state information to generate a parity bit.

### Claim 27 (depends on 18)

The method of claim 18, wherein:
processing the next operational state information to generate redundant information includes processing the next operational state information to generate a checksum.

### Claim 28 (depends on 18)

The method of claim 18, wherein:
processing the next operational state information to generate redundant information includes processing the next operational state information to generate an error detection codeword.

### Claim 29 (depends on 18)

The method of claim 18, wherein;
processing the next operational state information to generate redundant information includes processing the next operational state information to generate an error correction codeword.

### Claim 30 (depends on 18)

The method of claim 18, wherein;
processing the next operational state information to generate redundant information includes making a copy of the next operational state information.