# US 2014/0208147 A1 · Apparatus and method for locally optimizing source synchronous data strobes > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0208147 A1 - Document ID: US20140208147A1 - Status: Published application - Kind: A1 - Application number: 13/747,038 - Filed: 2013-01-22 - Published: 2014-07-24 - Earliest claimed: 2013-01-22 - Assignees: VIA Technologies, Inc. - Applicants: Via Technologies, Inc. - Inventors: Vanessa S. Canac; James R. Lundberg - Web page: https://patentgrep.com/patent/US20140208147A1 ## CPC - G06F 13/4243: {with synchronous protocol} - G06F 1/12: Synchronisation of different clock signals {provided by a plurality of clock generators} - G06F 13/4217: {with synchronous protocol} - G11C 7/1072: {for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories} - G11C 8/18: Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract An apparatus is provided that compensates for misalignment on a synchronous data bus. The apparatus includes a bit lag control element and a synchronous lag receiver. The bit lag control element is configured to measure a propagation time beginning with assertion of a strobe and ending with assertion of a first one of a plurality of radially distributed strobes corresponding to the strobe, and is configured to generate a value on a lag bus that indicates the propagation time. The synchronous lag receiver is coupled to the bit lag control element, and is configured to receive the first one of the plurality of radially distributed strobes and a data bit, and is configured to delay registering of the data bit by the propagation time. ## Claims ### Claim 1 An apparatus that compensates for misalignment on a synchronous data bus, the apparatus comprising: a bit lag control element, configured to measure a propagation time beginning with assertion of a strobe and ending with assertion of a first one of a plurality of radially distributed strobes corresponding to said strobe, and configured to generate a value on a lag bus that indicates said propagation time; and a synchronous lag receiver, coupled to said bit lag control element, configured to receive said first one of said plurality of radially distributed strobes and a data bit, and configured to delay registering of said data bit by said propagation time. ### Claim 2 (depends on 1) The apparatus as recited in claim 1, wherein said strobe and said data bit are received by a corresponding device within which the apparatus is disposed and are sourced by a transmitting device. ### Claim 3 (depends on 2) The apparatus as recited in claim 2, wherein the corresponding device comprises an x86-compatible microprocessor. ### Claim 4 (depends on 1) The apparatus as recited in claim 1, wherein said bit lag control element comprises a first plurality of matched inverters, and wherein said propagation time is expressed as a function of zero or more of said first plurality of matched inverters. ### Claim 5 (depends on 4) The apparatus as recited in claim 4, wherein said synchronous lag receiver comprises a second plurality of matched inverters that are replicas of said first plurality of matched inverters. ### Claim 6 (depends on 5) The apparatus as recited in claim 5, wherein said synchronous lag receiver delays registering of said data bit by propagating said data bit through zero or more of said second plurality of matched inverters as indicated by said value. ### Claim 7 (depends on 1) The apparatus as recited in claim 1, further comprising: a radial distribution element, configured to receive said strobe and to generate said plurality of radially distributed strobes, wherein a corresponding plurality of synchronous lag receivers each receive one of said plurality of radially distributed strobes, and wherein each of said plurality of radially distributed strobes exhibit equivalent propagation characteristics relative to said strobe at said corresponding plurality of synchronous lag receivers. ### Claim 8 An apparatus that compensates for misalignment on a synchronous data bus, the apparatus comprising: a microprocessor, comprising: a bit lag control element, configured to measure a propagation time beginning with assertion of a strobe and ending with assertion of a first one of a plurality of radially distributed strobes corresponding to said strobe, and configured to generate a value on a lag bus that indicates said propagation time; and a synchronous lag receiver, coupled to said bit lag control element, configured to receive said first one of said plurality of radially distributed strobes and a data bit, and configured to delay registering of said data bit by said propagation time. ### Claim 9 (depends on 8) The apparatus as recited in claim 8, wherein said strobe and said data bit are received by said microprocessor and are sourced by a transmitting device. ### Claim 10 (depends on 9) The apparatus as recited in claim 9, wherein said microprocessor comprises an x86-compatible microprocessor. ### Claim 11 (depends on 8) The apparatus as recited in claim 8, wherein said bit lag control element comprises a first plurality of matched inverters, and wherein said propagation time is expressed as a function of zero or more of said first plurality of matched inverters. ### Claim 12 (depends on 11) The apparatus as recited in claim 11, wherein said synchronous lag receiver comprises a second plurality of matched inverters that are replicas of said first plurality of matched inverters. ### Claim 13 (depends on 12) The apparatus as recited in claim 12, wherein said synchronous lag receiver delays registering of said data bit by propagating said data bit through zero or more of said second plurality of matched inverters as indicated by said value. ### Claim 14 (depends on 8) The apparatus as recited in claim 8, wherein said radial distribution network receives said strobe and generates said plurality of radially distributed strobes, and wherein a corresponding plurality of synchronous lag receivers each receive one of said plurality of radially distributed strobes, and wherein each of said plurality of radially distributed strobes exhibit equivalent propagation characteristics relative to said strobe at said corresponding plurality of synchronous lag receivers. ### Claim 15 A method that compensates for misalignment on a synchronous data bus, the method comprising: first replicating propagation characteristics of a radial distribution network for a strobe, first receiving a first signal, and first generating a second signal by employing replicated propagation characteristics; measuring a propagation time beginning with assertion of the first signal and ending with assertion of the second signal; second generating a value that indicates the propagation time; and second receiving a first one of a plurality of radially distributed strobes and a data bit, and delaying registering of the data bit by the propagation time. ### Claim 16 (depends on 15) The method as recited in claim 15, wherein the strobe and the data bit are received by a corresponding device and are sourced by a transmitting device. ### Claim 17 (depends on 16) The method as recited in claim 16, wherein the corresponding device comprises an x86-compatible microprocessor. ### Claim 18 (depends on 1) The method as recited in claim 1, wherein said second generating comprises: expressing the propagation time as a function of zero or more of a first plurality of matched inverters. ### Claim 19 (depends on 18) The method as recited in claim 18, further comprising: second replicating the first plurality of matched inverters via a second plurality of matched inverters. ### Claim 20 (depends on 19) The method as recited in claim 19, wherein said delaying comprises: propagating the data bit through zero or more of the second plurality of matched inverters as indicated by the value. ### Claim 21 (depends on 15) The method as recited in claim 15, further comprising: third generating the plurality of radially distributed strobes, and distributing the plurality of radially distributed strobes to a corresponding plurality of synchronous lag receivers, wherein each of the plurality of radially distributed strobes exhibit equivalent propagation characteristics relative to the strobe at the corresponding plurality of synchronous lag receivers.