# US 2014/0208141 A1 · Dynamically controlling interconnect frequency in a processor

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- Number: US 2014/0208141 A1
- Document ID: US20140208141A1
- Status: Published application
- Kind: A1
- Application number: 13/997,386
- Filed: 2012-03-13
- Published: 2014-07-24
- Earliest claimed: 2012-03-13
- Assignees: Intel Corporation
- Inventors: Malini K. Bhandaru; Ankush Varma; James R. Vash; Monica Wong-Chan; Eric J. Dehaemer; Christopher Allan Poirier, SR.; Scott P. Bobholz
- Web page: https://patentgrep.com/patent/US20140208141A1

## CPC

- G06F 1/3243: {Power saving in microcontroller unit}
- G06F 1/3206: Monitoring of events, devices or parameters that trigger a change in power modality
- G06F 1/324: by lowering clock frequency
- G06F 1/3296: by lowering the supply or operating voltage
- G06F 9/3885: {using a plurality of independent parallel functional units}
- G06F 12/0802: Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

In one embodiment, the present invention includes a method for determining whether a number of stalled cores of a multicore processor is greater than a stall threshold. If so, a recommendation may be made that an operating frequency of system agent circuitry of the processor be increased. Then based on multiple recommendations, a candidate operating frequency of the system agent circuitry can be set. Other embodiments are described and claimed.

## Claims

### Claim 1

An apparatus comprising:
a traffic sensor to measure communication traffic at a point of an interconnect at which an agent is coupled to the interconnect, the traffic sensor including:
a control storage to store control information to indicate a direction and a type of communication traffic to be measured;
a status storage to store a traffic measurement and to provide the traffic measurement to a controller responsive to a request for the traffic measurement; and
a plurality of counters each to store a traffic measurement for a direction and communication traffic type.

### Claim 2 (depends on 1)

The apparatus of claim 1, further comprising the controller, wherein the controller is to set the control storage and to read the traffic measurement from the status storage, wherein the controller is to issue a poll request or receive a push request to read the traffic measurement.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein the controller includes a sensor mask to store a first value to disable the traffic sensor and a second value to enable the traffic sensor.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the traffic sensor is located at an interface port coupled between the interconnect and a core of a multicore processor, the interconnect corresponding to a ring interconnect.

### Claim 5 (depends on 4)

The apparatus of claim 4, wherein the controller is to control an operating frequency of the interconnect based at least in part on the traffic measurement.

### Claim 6 (depends on 5)

The apparatus of claim 5, wherein the controller is to receive a maximum traffic measurement from each of a plurality of traffic sensors of the multicore processor, and to control the operating frequency of the interconnect based at least in part on a maximum traffic measurement of the maximum traffic measurements received from each of the plurality of traffic sensors.

### Claim 7 (depends on 1)

The apparatus of claim 1, further comprising a plurality of traffic sensors, each distributed within a multicore processor and associated within a stop associated with an agent coupled to the interconnect.

### Claim 8

A method comprising:
determining whether a number of stalled cores of a plurality of cores of a multicore processor is greater than a stall threshold;
if so, recommending that an operating frequency of system agent circuitry of the multicore processor be increased; and
setting a candidate operating frequency of the system agent circuitry based on a plurality of recommendations for the operating frequency.

### Claim 9 (depends on 8)

The method of claim 8, further comprising determining the operating frequency based on the candidate operating frequency, a maximum operating frequency of the system agent circuitry and a minimum operating frequency of the system agent circuitry, and updating the operating frequency to the determined one of the candidate operating frequency, the maximum operating frequency and the minimum operating frequency.

### Claim 10 (depends on 9)

The method of claim 9, further comprising clearing the plurality of recommendations when the operating frequency is changed.

### Claim 11 (depends on 8)

The method of claim 8, further comprising determining if a maximum traffic value of the system agent circuitry is greater than a bandwidth threshold for a current operating frequency of the system agent circuitry, and if so, recommending that the operating frequency be increased.

### Claim 12 (depends on 11)

The method of claim 11, further comprising determining if the maximum traffic value of the system agent circuitry is less than a bandwidth threshold for a lower operating frequency for the system agent circuitry, and if so, recommending that the operating frequency be decreased.

### Claim 13 (depends on 12)

The method of claim 12, further comprising if the maximum traffic value is between the bandwidth threshold for the current operating frequency and the bandwidth threshold for the lower operating frequency, recommending no change to the operating frequency.

### Claim 14 (depends on 8)

The method of claim 8, further comprising setting the candidate operating frequency to a maximum of a quality of service (QoS) threshold and an input/output (IO) threshold if the multicore processor is in a low power state.

### Claim 15

A system comprising:
a processor including a plurality of cores, a plurality of voltage regulators each to independently provide a voltage to at least one of the plurality of cores, and system agent circuitry including at least one cache memory, a memory controller and an interconnect to couple the plurality of cores and the at least one cache memory, the interconnect including a plurality of interface units each to couple the interconnect to one of the plurality of cores, wherein each of the interface units includes a traffic sensor to measure traffic at a location of the interconnect associated with the interface unit, the system agent circuitry further including a power controller to receive information regarding the traffic from at least some of the plurality of traffic sensors to control a frequency of the interconnect based on at least some of the information.

### Claim 16 (depends on 15)

The system of claim 15, wherein the power controller is to cause the interconnect frequency to be reduced to a selected one of a quality of service (QoS) threshold and an input/output (IO) threshold if the processor is in a low power state.

### Claim 17 (depends on 15)

The system of claim 15, wherein each of the plurality of cores further includes an activity sensor to generate an activity value and a stall sensor to generate a stall value, and the corresponding core is to communicate the activity value and the stall value to the power controller for an observation interval.

### Claim 18 (depends on 17)

The system of claim 17, wherein the power controller is to cause the interconnect frequency to be increased based on the stall value for at least some of the plurality of cores.

### Claim 19 (depends on 17)

The system of claim 17, wherein the power controller is to cause the interconnect frequency to be increased based on a threshold number of cores having a stall value exceeding a stall threshold.

### Claim 20 (depends on 15)

The system of claim 15, wherein the power controller is to increase the interconnect frequency based on the information from at least one of the traffic sensors if the information associated with the interface unit having the highest traffic is greater than a bandwidth threshold for a current frequency of the interconnect.

### Claim 21

(canceled)

### Claim 22

(canceled)

### Claim 23

(canceled)

### Claim 24

(canceled)