# US 2014/0208024 A1 · System and Methods for Performing Embedded Full-Stripe Write Operations to a Data Volume With Data Elements Distributed Across Multiple Modules

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- Number: US 2014/0208024 A1
- Document ID: US20140208024A1
- Status: Published application
- Kind: A1
- Application number: 14/033,474
- Filed: 2013-09-22
- Published: 2014-07-24
- Earliest claimed: 2013-01-22
- Assignees: LSI Corporation
- Applicants: LSI Corporation
- Inventors: Horia Simionescu; Anant Baderdinni; Luca Bert
- Web page: https://patentgrep.com/patent/US20140208024A1

## CPC

- G06F 3/061: {Improving I/O performance}
- G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors}
- G06F 3/064: {Management of blocks}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0688: {Non-volatile semiconductor memory arrays}
- G06F 11/1076: {Parity data used in redundant arrays of independent storages, e.g. in RAID systems}
- G06F 2211/1059: Parity-single bit-RAID5, i.e. RAID 5 implementations
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A data storage system and methods for managing data to be transferred between a host and a data volume distributed across solid state storage modules are disclosed. A storage controller couples the host to the data volume and manages data transfers to and from the logical volume. The storage controller receives a set of parameters that define how an array of blocks and chunks of buffered data will be distributed across solid state storage modules. The storage controller receives and buffers data to be stored and transfers the same when the capacity of the buffered data will fill a set of arranged stripes in the defined array in a single write operation.

## Claims

### Claim 1

A data storage system, comprising:
a controller comprising processing logic that is configurable to define and manage data transfers to and from at least one logical volume to be exposed to a host device, the data transfers as managed by the controller including data aligned for a single write operation to a set of arranged stripes in a defined array distributed across N solid state storage modules; and
a cache memory coupled to the controller for storing data to be written to the data volume.

### Claim 2 (depends on 1)

The data storage system of claim 1, wherein N is an integer greater than two.

### Claim 3 (depends on 1)

The data storage system of claim 1, wherein the N solid states modules are coupled to the controller via dedicated interfaces.

### Claim 4 (depends on 1)

The data storage system of claim 1, wherein the N solid state modules are integrated on a printed circuit.

### Claim 5 (depends on 1)

The data storage system of claim 1, wherein the defined array is segmented in blocks and chunks with the controller directing the transfer of data in accordance with the processing logic in a one-to-one manner with each chunk and a parity chunk communicated to a respective solid state storage module.

### Claim 6 (depends on 5)

The data storage system of claim 5, wherein the blocks have a data storage capacity that is greater than the bandwidth of an I/O circuit pipeline that communicates digital data to and from the circuit elements that store the data in the solid state memory units.

### Claim 7 (depends on 6)

The data storage system of claim 6, wherein the chunks have a data storage capacity that is equal to the bandwidth of the I/O circuit pipeline that communicates digital data to and from the circuit elements that store the data in the solid state memory units.

### Claim 8 (depends on 7)

The data storage system of claim 7, wherein the set of arranged stripes is a stride arranged in a sequential manner across the N solid state storage modules.

### Claim 9 (depends on 8)

The data storage device of claim 8, wherein the controller buffers data in the cache until a buffered data present in the cache is greater than or equal to a capacity equivalent to an amount of data that can be transferred in a full-stride write operation.

### Claim 10 (depends on 7)

The data storage system of claim 7, wherein the set of arranged stripes is a stride arranged in a planar manner across the N sold state storage modules.

### Claim 11 (depends on 1)

The data storage system of claim 1, wherein the host includes executable code that when executed by a processor coupled to the host enable operating system level functions with data processed by the controller.

### Claim 12 (depends on 1)

The data storage system of claim 1, wherein the host includes executable applications that operate in accordance with an input received via an interface, the executable applications, when executed by a processor coupled to the host, enable application level interaction with data processed by the controller.

### Claim 13 (depends on 12)

The data storage system of claim 12, wherein the interface is a human-to-machine interface.

### Claim 14

A method for processing data between a host and a data volume implemented by a controller, the method comprising:
defining a layout across a set of N solid state modules;
buffering, in a controller, data received from a host that is to be stored in a data volume supported by the set of N solid state modules;
determining, with the controller, when an amount of the data to be stored in the data volume is equal to or exceeds the storage capacity of a set of arranged stripes defined in the layout; and
when the amount of data to be stored in the data volume is equal to or exceeds the storage capacity of the set of arranged stripes, transferring the data to be stored from the controller to the N solid state modules in a single write operation.

### Claim 15 (depends on 14)

The method of claim 14, wherein the layout defines a data storage capacity of a block as a function of the bandwidth of an I/O circuit pipeline that communicates digital data to and from circuit elements that store the data in solid state memory units in the N solid state modules.

### Claim 16 (depends on 14)

The method of claim 14, wherein the layout defines a data storage capacity of a chunk that is equal to the bandwidth of an I/O circuit pipeline that communicates digital data to and from circuit elements that store the data in solid state memory units in the N solid state modules.

### Claim 17 (depends on 14)

The method of claim 14, wherein the set of arranged stripes is a stride arranged in a sequential manner across the N solid state storage modules.

### Claim 18 (depends on 14)

The method of claim 14, wherein the set of arranged stripes is a stride arranged in a planar manner across the N sold state storage modules.

### Claim 19

A set of instructions stored on a non-transitory storage medium, said set of instructions adapted to be executed by a storage controller to enable a method for performing embedded full-stripe write operations to a data volume distributed across multiple solid-state storage modules, the method comprising:
receiving, with a storage controller, a set of parameters that define a layout for distributing data across a set of N modules, the layout defining a block and a chunk both the block and the chunk having storage capacities selected as a function of a bandwidth of an I/O circuit pipeline that communicates digital data to and from circuit elements that store the data in solid state memory units in the N modules;
buffering, in a cache coupled to the storage controller, data received from a host that is to be stored in a data volume supported by the set of N solid state modules;
determining when an amount of the data to be stored in the data volume is equal to or exceeds the storage capacity of a set of arranged stripes defined by the layout; and
in response to the determining, transferring the data to be stored from the controller to the N solid state modules in a single write operation.

### Claim 20 (depends on 19)

The set of instructions stored on the non-transitory storage medium of claim 19, wherein when the instructions are executed the set of arranged stripes defines a stride the contents of which are filled in a single write operation by the storage controller.