# US 2014/0197975 A1 · Wide range input current circuitry for an analog to digital converter > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0197975 A1 - Document ID: US20140197975A1 - Status: Published application - Kind: A1 - Application number: 14/143,031 - Filed: 2013-12-30 - Published: 2014-07-17 - Earliest claimed: 2013-01-17 - Assignees: Microsemi Corp.—Analog Mixed Signal Group Ltd. - Applicants: Microsemi Corp.-Analog Mixed Signal Group, Ltd. - Inventors: Shimon COHEN - Web page: https://patentgrep.com/patent/US20140197975A1 ## CPC - H03M 1/12: Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) - H03M 1/129: {Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling (H03M1/18 takes precedence); Out-of-range indication} - H03M 1/186: {in feedforward mode, i.e. by determining the range to be selected directly from the input signal} - H03M 1/00: Analogue/digital conversion; Digital/analogue conversion (conversion of analogue values to or from differential modulation H03M3/00) - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract An input circuitry for an ADC constituted of: a first resistor coupled to an input of the ADC; a second resistor coupled to the input of the ADC and arranged to provide a current path; an electronically controlled switch coupled to the first resistor and arranged to provide a parallel current path through the first resistor; and a control circuitry; wherein the control circuitry is arranged to operate in a high current mode in the event that the input current exhibits an intensity within a first predetermined range and is arranged to operate in a low current mode in the event that the input current exhibits an intensity within a second predetermined range, different than the first predetermined range, wherein, in the high current mode the control circuitry is arranged to close the electronically controlled switch and in the low current mode is arranged to open the electronically controlled switch. ## Claims ### Claim 1 A wide range input current circuitry for an analog to digital converter (ADC), the wide range input current circuitry comprising: a first resistor coupled to an input of the ADC; a first electronically controlled switch coupled to said first resistor; a second resistor coupled to the input of the ADC and arranged to provide a current path for an input current; a control circuitry in communication with said first electronically controlled switch and arranged to alternately open and close said first electronically controlled switch, wherein said control circuitry is arranged to operate in a high current mode in the event that the input current exhibits an intensity within a first predetermined range and is arranged to operate in a low current mode in the event that the input current exhibits an intensity within a second predetermined range, said second predetermined range lower than the first predetermined range, wherein in said high current mode said control circuitry is arranged to close said first electronically controlled switch, said first electronically controlled switch arranged when closed to provide a parallel current path for the input current through said first resistor, and wherein in said low current mode said control circuitry is arranged to open said first electronically controlled switch, said first electronically controlled switch arranged when opened to prevent the flow of the input current through said first resistor thus not providing said parallel current path. ### Claim 2 (depends on 1) The circuitry of claim 1, further comprising a second electronically controlled switch coupled to said second resistor, wherein, responsive to both the high current mode and low current mode of said control circuitry, said second electronically controlled switch is arranged to be closed, and wherein the ratio between the area of said first electronically controlled switch and the area of said second electronically controlled switch is equal to the ratio between the resistance of said second resistor and the resistance of said first resistor. ### Claim 3 (depends on 2) The circuitry of claim 2, wherein a first end of said first resistor is coupled to a first terminal of said first electronically controlled switch, a first end of said second resistor is coupled to a first terminal of said second electronically controlled switch and a second terminal of said first electronically controlled switch is coupled to a second terminal of said second electronically controlled switch, wherein the common node of said second resistor and said second electronically controlled switch is coupled to the input of the ADC, and wherein the common node of said first electronically controlled switch and said second electronically switch is arranged to receive the input current. ### Claim 4 (depends on 3) The circuitry of claim 3, further comprising a differential amplifier, a first input of said differential amplifier coupled to a reference voltage, a second input of said differential amplifier coupled to the common node of said second resistor and said second electronically controlled switch and the output of said differential amplifier coupled to a control input of each of said first electronically controlled switch and said second electronically controlled switch, wherein the output of said differential amplifier is arranged to control the amount of current flowing through each of said first electronically controlled switch and said second electronically controlled switch responsive to the difference between the reference voltage and the voltage across said second resistor. ### Claim 5 (depends on 1) The circuitry of claim 1, further comprising a second electronically controlled switch coupled to said second resistor, wherein said control circuitry is arranged in both said high current mode and low current mode to close said second electronically controlled switch, wherein a first end of said first resistor is coupled to a first terminal of said first electronically controlled switch, a first end of said second resistor is coupled to a first terminal of said second electronically controlled switch and a second terminal of said first electronically controlled switch is coupled to a second terminal of said second electronically controlled switch, wherein the common node of said second resistor and said second electronically controlled switch is coupled to the input of the ADC, and wherein the common node of said first electronically controlled switch and said second electronically switch is arranged to receive the input current. ### Claim 6 A method of providing a wide range of input currents for an analog to digital converter (ADC), the method comprising: in the event that an input current exhibits an intensity within a first predetermined range, providing a current path for the input current through a first resistor and a parallel current path through a second resistor, the first resistor and the second resistor each coupled to an input of the ADC; and in the event that the input current exhibits an intensity within a second predetermined range, lower than the first predetermined range, providing the current path for the input current through the second resistor and not providing the parallel current path. ### Claim 7 (depends on 6) The circuitry of claim 6, wherein said providing the parallel current path through the first resistor comprises closing a first electronically controlled switch coupled to the first resistor, wherein said providing the current path through the second resistor comprises closing a second electronically controlled switch coupled to the second resistor, wherein the ratio between the area of the first electronically controlled switch and the area of the second electronically controlled switch is equal to the ratio between the resistance of the second resistor and the resistance of the first resistor. ### Claim 8 (depends on 7) The method of claim 7, wherein a first end of the first resistor is coupled to a first terminal of the first electronically controlled switch, a first end of the second resistor is coupled to a first terminal of the second electronically controlled switch and a second terminal of the first electronically controlled switch is coupled to a second terminal of the second electronically controlled switch, wherein the common node of the second resistor and the second electronically controlled switch is coupled to the input of the ADC, and wherein the common node of the first electronically controlled switch and the second electronically switch is arranged to receive the input current. ### Claim 9 (depends on 8) The method of claim 8, further comprising controlling the amount of current flowing through each of the first electronically controlled switch and the second electronically controlled switch responsive to the difference between the voltage across the second resistor and a reference voltage. ### Claim 10 (depends on 6) The circuitry of claim 6, wherein said providing said current path through the first resistor comprises closing a first electronically controlled switch coupled to the first resistor, wherein said providing the current path through the second resistor comprises closing a second electronically controlled switch coupled to the second resistor, wherein a first end of the first resistor is coupled to a first terminal of the first electronically controlled switch, a first end of the second resistor is coupled to a first terminal of the second electronically controlled switch and a second terminal of the first electronically controlled switch is coupled to a second terminal of the second electronically controlled switch, wherein the common node of the second resistor and the second electronically controlled switch is coupled to the input of the ADC, and wherein the common node of the first electronically controlled switch and the second electronically switch is arranged to receive the input current. ### Claim 11 A wide range input current circuitry for an analog to digital converter (ADC), the wide range input current circuitry comprising: a first means for providing electrical resistance coupled to an input of the ADC; a second means for providing electrical resistance arranged to be coupled to the input of the ADC and arranged to provide a current path for an input current; a first electronically controlled means for opening and closing a parallel current path coupled to said first means for providing electrical resistance; and a control circuitry in communication with said first electronically controlled means for opening and closing a parallel current path and arranged to control said first electronically controlled means for opening and closing a parallel current path to alternately open and close the parallel current path, wherein said control circuitry is arranged to operate in a high current mode in the event that the input current exhibits an intensity within a first predetermined range and is arranged to operate in a low current mode in the event that the input current exhibits an intensity within a second predetermined range, lower than the first predetermined range, wherein in said high current mode said control circuitry is arranged to control said first electronically controlled means for opening and closing to close thereby providing a parallel current path for the input current through said first means for providing electrical resistance, and wherein in said low current mode said control circuitry is arranged to control said first electronically controlled means for opening and closing path to open thereby preventing the presentation of a parallel current path through said first means for providing electrical resistance. ### Claim 12 (depends on 11) The circuitry of claim 11, further comprising a second electronically controlled means for opening and closing a current path coupled to said second means for providing electrical resistance, wherein, responsive to both the high current mode and low current mode of said control circuitry, said second electronically controlled means for opening and closing is arranged to close the current path for the input current through said second means for providing electrical resistance, and wherein the ratio between the area of said first electronically controlled means for opening and closing and the area of said second electronically controlled means for opening and closing is equal to the ratio between the resistance of said first means for providing electrical resistance and the resistance of said second means for providing electrical resistance. ### Claim 13 (depends on 12) The circuitry of claim 12, wherein a first end of said first means for providing an electrical resistance is coupled to a first terminal of said first electronically controlled means for opening and closing, a first end of said second means for providing an electrical resistance is coupled to a first terminal of said second electronically controlled means for opening and closing and a second terminal of said first electronically controlled means for opening and closing is coupled to a second terminal of said second electronically controlled means for opening and closing, wherein the common node of said second means for providing electrical resistance and said second electronically controlled means for opening and closing is coupled to the input of the ADC, and wherein the common node of said first electronically controlled means for opening and closing and said second electronically controlled means for opening and closing is arranged to receive the input current. ### Claim 14 (depends on 13) The circuitry of claim 13, further comprising a means for amplifying a voltage difference, a first input of said means for amplifying a voltage difference coupled to a reference voltage, a second input of said means for amplifying a voltage difference coupled to the common node of said means for providing electrical resistance and said second electronically controlled means for opening and closing and the output of said means for amplifying a voltage difference coupled to a control input of each of said first electronically controlled means for opening and closing and said second electronically controlled means for opening and closing, wherein the output of said means for amplifying a voltage difference is arranged to control the amount of current flowing through each of said first electronically controlled means for opening and closing and said second electronically controlled means for opening and closing responsive to the difference between the reference voltage and the voltage across said second means for providing electrical resistance. ### Claim 15 (depends on 11) The circuitry of claim 11, further comprising a second electronically controlled means for opening and closing a current path coupled to said second means for providing electrical resistance, wherein said control circuitry is arranged in both said high current mode and low current mode to control said second electronically controlled means for opening and closing to thus close the current path for the input current through said second means for providing electrical resistance, wherein a first end of said first means for providing an electrical resistance is coupled to a first terminal of said first electronically controlled means for opening and closing, a first end of said second means for providing an electrical resistance is coupled to a first terminal of said second electronically controlled means for opening and closing and a second terminal of said first electronically controlled means for opening and closing coupled to a second terminal of said second electronically controlled means for opening and closing, wherein the common node of said second means for providing electrical resistance and said second electronically controlled means for opening and closing is coupled to the input of the ADC, and wherein the common node of said first electronically controlled means for opening and closing and said second electronically controlled means for opening and closing is arranged to receive the input current.