# US 2014/0197893 A1 · Amplification Circuit Having Optimization of Power > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0197893 A1 - Document ID: US20140197893A1 - Status: Published application - Kind: A1 - Application number: 13/996,758 - Filed: 2012-01-26 - Published: 2014-07-17 - Earliest claimed: 2011-01-27 - Assignees: ST-Ericsson SA - Inventors: Vincent Knopik - Web page: https://patentgrep.com/patent/US20140197893A1 ## CPC - H03F 1/02: Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation - H03F 1/0277: {Selecting one or more amplifiers from a plurality of amplifiers} - H03F 3/193: with field-effect devices (H03F3/195 takes precedence) - H03F 3/21: with semiconductor devices only {(H03F3/245 takes precedence)} - H03F 3/211: {using a combination of several amplifiers (H03F3/60 takes precedence)} - H03F 3/72: Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal - H03F 2200/453: Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit - H03F: AMPLIFIERS ## Abstract A Power amplifier circuit comprising an input, an output comprising: means for sensing the input voltage; and a set of n cascode circuits, each comprising a first transistor having a gate, a source and a drain terminal and further comprising a second transistor having gate, source and drain terminal; the source and gate of the first transistor of said cascode circuits being respectively connected to a first reference voltage and to receive the input signal, the drain of said first transistor being connected to the source of said second transistor, the drain of which being coupled to said output. By activating or deactivating one or more of the n cascode circuits, the total size of the amplification components can be adapted to the value of the output power to generate. ## Claims ### Claim 1 Power amplifier circuit comprising an input, an output comprising: means for sensing the input voltage; a set of n cascode circuits, each comprising a first transistor having a gate, a source and a drain terminal and further comprising a second transistor having gate, source and drain terminal; the source and gate of the first transistor of said cascode circuits being respectively connected to a first reference voltage and to receive the input signal, the drain of said first transistor being connected to the source of said second transistor, the drain of which being coupled to said output; a control circuit receiving the input voltage sensed by said sensing means for generating a set of control signals which are transmitted to the gates of the second transistors of said n cascode circuits; so as to activate or deactivate some of said n cascode circuits and adapt the size of the transistors to the output power to issue to a load. ### Claim 2 (depends on 1) Power amplifier circuit according to claim 1 wherein each of said second transistor is biased, when activated by said control circuit, in class AB showing a quiescent current Iq. ### Claim 3 (depends on 1) Power amplifier circuit according to claim 1 wherein said sensing means comprises: an additional cascode circuit a first transistor having a gate, a source and a drain terminal and further comprising a second transistor having gate, source and drain terminal; the source and gate of the first transistor of said cascode circuits being respectively connected to a first reference voltage and to receive the input signal, the drain of said first transistor being coupled to the source of said second transistor, and a passive circuit coupled between a reference voltage and the drain of said second transistor of said additional cascode circuit, said passive circuit comprising two resistors mounted as a voltage divider and, in parallel, one capacitor for averaging the RF signal sensed by said sensing means. ### Claim 4 (depends on 3) Power amplifier circuit according to claim 3 wherein the voltage across one of said resistors is transmitted to one input of said control circuit so as to determine the magnitude of the input signal to be amplified and, therefore, the number of cascode elements to activate/deactivate. ### Claim 5 (depends on 1) Power amplifier circuit according to claim 1 wherein it is used for embodying a Radio Frequency amplifier. ### Claim 6 (depends on 1) Power amplification circuit according to claim 1 wherein it is used in a mobile telephone. ### Claim 7 Power amplification circuit comprising a first MOS transistor having a higher size and biased in class AB amplification, having a gate, source and drain terminal, the source being connected to the ground and the gate being coupled to receive the input signal; a second MOS transistor having a lower size and biased in class A, having a gate, source and drain terminals, the source being connected to the ground and the gate being coupled to receive the input signal; the drains of said first and said second MOS transistor being coupled together to generate the output current to drive the load of said power amplification circuit; and whereby when the input signal increases the Class AB contribution increases while Vout from Class A decreases (compression), thus smoothing the total gain of said power amplification circuit. ### Claim 8 (depends on 7) Power amplification circuit according to claim 7 wherein it further comprises a third transistor mounted as a cascode transistor on the top of both first and second transistors, said cascode transistor having its source connected to the drains of said first and second transistors and a drain coupled to the output of said amplifier. ### Claim 9 (depends on 7) Power amplification circuit according to claim 7 wherein it is used for embodying a RF amplification for wireless mobile telecommunications. ### Claim 10 (depends on 1) Mobile equipment comprising one amplification circuits as defined in claim 1.