# US 2014/0197878 A1 · Switchable readout device

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- Number: US 2014/0197878 A1
- Document ID: US20140197878A1
- Status: Published application
- Kind: A1
- Application number: 13/904,538
- Filed: 2013-05-29
- Published: 2014-07-17
- Earliest claimed: 2013-01-14
- Assignees: National Chi Nan University
- Applicants: National Chi Nan University
- Inventors: Tai-Ping SUN; Yi-Chuan LU; Ming-Sheng YANG; Tse-Hsin CHEN
- Web page: https://patentgrep.com/patent/US20140197878A1

## CPC

- G01J 5/02: Constructional details
- G01J 3/36: Investigating two or more bands of a spectrum by separate detectors
- G01J 5/10: using electric radiation detectors
- G01J 5/30: Electrical features thereof
- H03K 17/00: Electronic switching or gating, i.e. not by contact-making and –breaking (gated amplifiers H03F3/72; switching arrangements for exchange systems using static devices H04Q3/52)
- H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
- G11C 7/067: {Single-ended amplifiers}
- G11C 27/026: {associated with an amplifier (G11C27/028 takes precedence)}
- G11C 2207/063: Current sense amplifiers
- G01J: MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY (light sources F21, H01J, H01K, H05B; investigating properties of materials by optical means G01N)
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A readout device is adapted for dual-band sensing, and includes an amplifier, two direct injection (DI) readout circuits to be respectively connected to two sensors, and a switching module. Through operation of the switching module, one of the DI readout circuits can be electrically connected to the amplifier, and cooperate with the other DI readout circuit to achieve a dual-band sensing feature.

## Claims

### Claim 1

A readout device adapted for use with a first sensor and a second sensor, the first sensor generating a first sensed current upon a sensing activity thereof, the second sensor generating a second sensed current upon a sensing activity thereof, said readout device comprising:
an amplifier including a first input disposed to receive a reference voltage, a second input and an output;
a first direct injection (DI) readout circuit including a current input to be coupled to the first sensor so as to receive the first sensed current therefrom, and a biasing terminal, and configured to convert the first sensed current for obtaining a first output voltage;
a second DI readout circuit including a current input to be coupled to the second sensor so as to receive the second sensed current therefrom, and a biasing terminal, and configured to convert the second sensed current for obtaining a second output voltage; and
a switching module coupled to said second input of said amplifier and said current inputs of said first and second DI readout circuits, said switching module being controllable to make or break electrical connection between said current input of said first DI readout circuit and said second input of said amplifier, and to make or break electrical connection between said current input of said second DI readout circuit and said second input of said amplifier;
said switching module being further coupled to said output of said amplifier and said biasing terminals of said first and second DI readout circuits, and to be coupled to a bias voltage source, said switching module being controllable to make or break electrical connection between said biasing terminal of said first DI readout circuit and one of said output of said amplifier and the bias voltage source, and to make or break electrical connection between said biasing terminal of said second DI readout circuit and one of said output of said amplifier and the bias voltage source.

### Claim 2 (depends on 1)

The readout device as claimed in claim 1, wherein said first DI readout circuit includes:
a first integrator unit coupled to said current input and said biasing terminal of said first DI readout circuit, and configured to convert the first sensed current into a first integration voltage that has a magnitude proportional to a magnitude of the first sensed current; and
a first sample-and-hold unit coupled to said first integrator unit to receive the first integration voltage, and controllable to sample the first integration voltage and hold the first integration voltage thus sampled to obtain the first output voltage;
said second DI readout circuit including:
a second integrator unit coupled to said current input and said biasing terminal of said second DI readout circuit, and configured to convert the second sensed current into a second integration voltage that has a magnitude proportional to a magnitude of the second sensed current; and
a second sample-and-hold unit coupled to said second integrator unit to receive the second integration voltage, and controllable to sample the second integration voltage and to hold the second integration voltage thus sampled to obtain the second output voltage.

### Claim 3 (depends on 2)

The readout device as claimed in claim 2, wherein said first integrator unit includes:
a first transistor having a first terminal coupled to said current input of said first DI readout circuit, a second terminal, and a control terminal coupled to said biasing terminal of said first DI readout circuit;
a first integrator capacitor having a first terminal coupled to said second terminal of said first transistor, and a second terminal disposed to receive an adjustment voltage; and
a first reset switch coupled across said first integrator capacitor for resetting a voltage across said first integrator capacitor;
said second integrator unit including:
a second transistor having a first terminal coupled to said current input of said second DI readout circuit, a second terminal, and a control terminal coupled to said biasing terminal of said second DI readout circuit;
a second integrator capacitor having a first terminal coupled to said second terminal of said second transistor, and a second terminal disposed to receive the adjustment voltage; and
a second reset switch coupled across said second integrator capacitor for resetting a voltage across said second integrator capacitor.

### Claim 4 (depends on 3)

The readout device as claimed in claim 3, wherein said switching module includes:
a first input switch coupled between said second input of said amplifier and said first terminal of said first transistor;
a first output switch coupled between said output of said amplifier and said control terminal of said first transistor;
a first biasing switch disposed to couple said control terminal of said first transistor to the bias voltage source;
a second input switch coupled between said second input of said amplifier and said first terminal of said second transistor;
a second output switch coupled between said output of said amplifier and said control terminal of said second transistor; and
a second biasing switch disposed to couple said control terminal of said second transistor to the bias voltage source;
wherein said first input switch, said first output switch and said first biasing switch are controlled by a first signal to make or break electrical connection, and said second input switch, said second output switch and said second biasing switch are controlled by a second signal to make or break electrical connection.

### Claim 5 (depends on 3)

The readout device as claimed in claim 3, wherein said first sample-and-hold unit includes:
a first sampling switch having a first terminal coupled to said first terminal of said first integrator capacitor, and a second terminal;
a first sampling capacitor having a first terminal coupled to said second terminal of said first sampling switch, and a grounded second terminal; and
a first sampling reset switch coupled to said first sampling capacitor in parallel for resetting a voltage across said first sampling capacitor;
said second sample-and-hold unit including:
a second sampling switch having a first terminal coupled to said first terminal of said second integrator capacitor, and a second terminal;
a second sampling capacitor having a first terminal coupled to said second terminal of said second sampling switch, and a grounded second terminal; and
a second sampling reset switch coupled to said second sampling capacitor in parallel for resetting a voltage across said second sampling capacitor.

### Claim 6 (depends on 1)

The readout device as claimed in claim 1, wherein said first DI readout circuit is disposed at a first area, said second DI readout circuit is disposed at a second area adjacent to the first area, and said amplifier is disposed between said first and second DI readout circuits, said amplifier being shared by the first and second areas.

### Claim 7

A readout device adapted for use with a first sensor and a second sensor, the first sensor generating a first sensed current upon a sensing activity thereof, the second sensor generating a second sensed current upon a sensing activity thereof, said readout device comprising:
an amplifier including a first input disposed to receive a reference voltage, a second input and an output;
a first direct injection (DI) readout circuit including a current input to be coupled to the first sensor so as to receive the first sensed current therefrom, a biasing terminal, a first terminal and a second terminal, and configured to convert the first sensed current for producing a first output voltage;
a second DI readout circuit including a current input to be coupled to the second sensor so as to receive the second sensed current therefrom, a biasing terminal, a first terminal and a second terminal, and configured to convert the second sensed current for producing a second output voltage; and
a switching module coupled to said second input of said amplifier and said first terminals of said first and second DI readout circuits, said switching module being controllable to make or break electrical connection between said first terminal of said first DI readout circuit and said second input of said amplifier, and to make or break electrical connection between said first terminal of said second DI readout circuit and said second input of said amplifier;
said switching module being further coupled to said output of said amplifier and said second terminals of said first and second DI readout circuits, said switching module being controllable to make or break electrical connection between said second terminal of said first DI readout circuit and said output of said amplifier, and to make or break electrical connection between said second terminal of said second DI readout circuit and said output of said amplifier;
said switching module being further coupled to said biasing terminals of said first and second DI readout circuits, and to be coupled to a ground node and a bias voltage source, said switching module being controllable to make or break electrical connection between said biasing terminal of said first DI readout circuit and one of the ground node and the bias voltage source, and to make or break electrical connection between said biasing terminal of said second DI readout circuit and one of the ground node and the bias voltage source.

### Claim 8 (depends on 7)

The readout device as claimed in claim 7, wherein said first DI readout circuit includes:
a first integrator unit coupled to said current input, said biasing terminal, said first terminal and said second terminal of said first DI readout circuit, and configured to convert the first sensed current into a first integration voltage; and
a first sample-and-hold unit coupled to said first integrator unit upon switching of said switching module to receive the first integration voltage, and controllable to sample the first integration voltage and hold the first integration voltage thus sampled to obtain the first output voltage;
said second DI readout circuit including:
a second integrator unit coupled to said current input, said biasing terminal, said first terminal and said second terminal of said second DI readout circuit, and configured to convert the second sensed current into a second integration voltage; and
a second sample-and-hold unit coupled to said second integrator unit upon switching of said switching module to receive the second integration voltage, and being controllable to sample the second integration voltage and to hold the second integration voltage thus sampled to obtain the second output voltage.

### Claim 9 (depends on 8)

The readout device as claimed in claim 8, wherein said first integrator unit includes:
a first transistor having a first terminal coupled to said current input of said first DI readout circuit, a second terminal coupled to said first terminal of said first DI readout circuit, and a control terminal coupled to said biasing terminal of said first DI readout circuit;
a first integrator capacitor having a first terminal coupled to said second terminal of said first transistor, and a second terminal coupled to said second terminal of said first DI readout circuit; and
a first reset switch coupled across said first integrator capacitor for resetting a voltage across said first integrator capacitor;
said second integrator unit including:
a second transistor having a first terminal coupled to said current input of said second DI readout circuit, a second terminal coupled said first terminal of said second DI readout circuit, and a control terminal coupled to said biasing terminal of said second DI readout circuit;
a second integrator capacitor having a first terminal coupled to said second terminal of said second transistor, and a second terminal coupled to said second terminal of said second DI readout circuit; and
a second reset switch coupled across said second integrator capacitor for resetting a voltage across said second integrator capacitor.

### Claim 10 (depends on 9)

The readout device as claimed in claim 9, wherein said switching module includes:
a first grounding switch disposed to couple said control terminal of said first transistor to the ground node;
a first input switch coupled between said second input of said amplifier and said first terminal of said first integrator capacitor;
a first output switch coupled between said output of said amplifier and said second terminal of said first integrator capacitor;
a first biasing switch disposed to couple said control terminal of said first transistor to the bias voltage source;
a first voltage switch disposed to couple said second terminal of said first integrator capacitor to an adjustment voltage source;
a first DI output switch coupled between said first terminal of said first integrator capacitor and said first sample-and-hold unit;
a first amplifier output switch coupled between said output of said amplifier and said first sample-and-hold unit;
a second grounding switch disposed to couple said control terminal of said second transistor to the ground node;
a second input switch coupled between said second input of said amplifier and said first terminal of said second integrator capacitor;
a second output switch coupled between said output of said amplifier and said second terminal of said second integrator capacitor;
a second biasing switch disposed to couple said control terminal of said second transistor to the bias voltage source;
a second voltage switch disposed to couple said second terminal of said second integrator capacitor to the adjustment voltage source;
a second DI output switch coupled between said first terminal of said second integrator capacitor and said second sample-and-hold unit; and
a second amplifier output switch coupled between said output of said amplifier and said second sample-and-hold unit;
wherein said first grounding switch, said first input switch, said first output switch, said first biasing switch, said first voltage switch, said first DI output switch and said first amplifier output switch are controlled by a first signal to make or break electrical connection, and said second grounding switch, said second input switch, said second output switch, said second biasing switch, said second voltage switch, said second DI output switch and said second amplifier switch are controlled by a second signal to make or break electrical connection.

### Claim 11 (depends on 10)

The readout device as claimed in claim 10, wherein said first sample-and-hold unit includes:
a first sampling switch having a first terminal coupled to said switching module, and a second terminal;
a first sampling capacitor having a first terminal coupled to said second terminal of said first sampling switch, and a grounded second terminal; and
a first sampling reset switch coupled to said first sampling capacitor in parallel for resetting a voltage across said first sampling capacitor;
said second sample-and-hold unit including:
a second sampling switch having a first terminal coupled to said switching module, and a second terminal;
a second sampling capacitor having a first terminal coupled to said second terminal of said second sampling switch, and a grounded second terminal; and
a second sampling reset switch coupled to said second sampling capacitor in parallel for resetting a voltage across said second sampling capacitor;
wherein said first DI output switch is coupled between said first terminal of said first integrator capacitor and said first terminal of said first sampling switch of said first sample-and-hold unit;
said first amplifier output switch is coupled between said output of said amplifier and said first terminal of said first sampling switch of said first sample-and-hold unit;
said second DI output switch is coupled between said first terminal of said second integrator capacitor and said first terminal of said second sampling switch of said second sample-and-hold unit; and
said second amplifier output switch is coupled between said output of said amplifier and said first terminal of said second sampling switch of said second sample-and-hold unit.

### Claim 12 (depends on 8)

The readout device as claimed in claim 8, wherein said first sample-and-hold unit includes:
a first sampling switch having a first terminal coupled to said switching module, and a second terminal;
a first sampling capacitor having a first terminal coupled to said second terminal of said first sampling switch, and a grounded second terminal; and
a first sampling reset switch coupled to said first sampling capacitor in parallel for resetting a voltage across said first sampling capacitor;
said second sample-and-hold unit including:
a second sampling switch having a first terminal coupled to said switching module, and a second terminal;
a second sampling capacitor having a first terminal coupled to said second terminal of said second sampling switch, and a grounded second terminal; and
a second sampling reset switch coupled to said second sampling capacitor in parallel for resetting a voltage across said second sampling capacitor.