# US 2014/0197871 A1 · Transmission system

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- Number: US 2014/0197871 A1
- Document ID: US20140197871A1
- Status: Published application
- Kind: A1
- Application number: 13/740,823
- Filed: 2013-01-14
- Published: 2014-07-17
- Earliest claimed: 2013-01-14
- Assignees: Freescale Semiconductor, Inc.
- Inventors: PERRY H. PELLEY
- Web page: https://patentgrep.com/patent/US20140197871A1

## CPC

- H03K 3/012: Modifications of generator to improve response time or to decrease power consumption
- H03K 3/021: by the use, as active elements, of more than one type of element or means, e.g. BIMOS, composite devices such as IGBT
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)

## Abstract

A signal transmission system (10) includes a signal generator circuit (12); a signal regenerator circuit (14) coupled to the signal generator circuit by conductive lines (16, 18). The signal regenerator circuit receives input signals from the signal generator circuit on the conductive lines, and the regenerator circuit includes cascoded transistors (39, 41) and level-shifting circuits (26) coupled to the cascoded transistors. The cascoded transistors amplify the input signals to provide amplified signals. The level-shifting circuits shift a voltage level of the amplified signals to provide level-shifted signals.

## Claims

### Claim 1

A signal transmission system comprising:
a signal generator circuit;
a signal regenerator circuit coupled to the signal generator circuit by conductive lines with parasitic resistance and capacitance, wherein
the signal regenerator circuit receives input signals from the signal generator circuit on the conductive lines, and
the signal regenerator circuit includes cascoded transistors, level-shifting circuits coupled to the cascoded transistors, and a plurality of capacitors, wherein;
the cascoded transistors amplify the input signals to provide amplified signals;
the level-shifting circuits shift a voltage level of the amplified signals to provide level-shifted signals; and
each of the plurality of capacitors is coupled to a respective one of the conductive lines between the signal generator circuit and the cascoded transistors.

### Claim 2

(canceled)

### Claim 3 (depends on 1)

The system of claim 1, further comprising:
a first supply voltage coupled to control operation of the cascoded transistors;
a charge pump coupled to the signal regenerator circuit to provide a second supply voltage to the signal regenerator circuit, wherein the second supply voltage is greater than the first supply voltage.

### Claim 4

A signal transmission system comprising:
a signal generator circuit;
a signal regenerator circuit coupled to the signal generator circuit by conductive lines with parasitic resistance and capacitance, wherein
the signal regenerator circuit receives input signals from the signal generator circuit on the conductive lines, and
the signal regenerator circuit includes cascoded transistors, a headroom voltage circuit coupled to the cascoded transistors, and level-shifting circuits coupled to the cascoded transistors, wherein the cascoded transistors amplify the input signals to provide amplified signals and the level-shifting circuits shift a voltage level of the amplified signals to provide level-shifted signals.

### Claim 5 (depends on 4)

The system of claim 4, the signal regenerator circuit further comprising:
saturation limit circuitry coupled to the headroom voltage circuit.

### Claim 6 (depends on 3)

The system of claim 3, the signal regenerator circuit further comprising:
a headroom voltage circuit coupled between the charge pump and the cascoded transistors.

### Claim 7 (depends on 1)

The system of claim 1, wherein the cascoded transistors are lateral NPN bipolar transistors.

### Claim 8 (depends on 1)

The system of claim 1, wherein the signal regenerator circuit further includes a flip-flop circuit coupled to receive the level-shifted signals and provide an output signal from the signal regenerator circuit.

### Claim 9 (depends on 3)

The system of claim 3, wherein the level-shifting circuits comprise:
a first capacitor, an input to the first capacitor is coupled between a voltage headroom circuit and the cascoded transistors;
an N-channel transistor having a source coupled to a supply voltage and a gate and a drain coupled to an output of the first capacitor;
a P-channel transistor having a source coupled to a supply voltage and a gate and a drain coupled to the output of the first capacitor; and
an inverter having an input coupled to the output of the first capacitor and an output no greater than a voltage level of the first supply voltage.

### Claim 10 (depends on 1)

The system of claim 1, wherein the signal regenerator circuit further includes a bias circuit coupled the cascoded transistors.

### Claim 11

A signal transmission system, comprising:
a pair of amplifying transistors;
a pair of transmission lines, wherein each of the transmission lines is coupled to provide input signals to a respective one of the amplifying transistors;
a pair of level-shifting circuits, each of the level-shifting circuits coupled to a respective one of the amplifying transistors, wherein the level-shifting circuits reduce voltage of amplified signals from the amplifying transistors; and
a voltage headroom circuit coupled to the pair of amplifying transistors.

### Claim 12

(canceled)

### Claim 13 (depends on 11)

The system of claim 11, further comprising:
saturation limiting circuitry coupled to the voltage headroom circuit.

### Claim 14

A signal transmission system, comprising:
a pair of amplifying transistors;
a pair of transmission lines, wherein each of the transmission lines is coupled to provide input signals to a respective one of the amplifying transistors;
a pair of level-shifting circuits, each of the level-shifting circuits coupled to a respective one of the amplifying transistors, wherein the level-shifting circuits reduce voltage of amplified signals from the amplifying transistors;
a pair of capacitors, wherein each of the capacitors is coupled between a respective one of the amplifying transistors and the level-shifting circuits; and
a pair of capacitors, wherein each of the capacitors is coupled between a respective one of the amplifying transistors and the level-shifting circuits.

### Claim 15 (depends on 11)

The system of claim 11, wherein the level-shifting circuits comprise:
an N-channel transistor having a source coupled to a supply voltage and a gate and a drain coupled to an output of a first capacitor;
a P-channel transistor having a source coupled to a supply voltage and a gate and a drain coupled to the output of the first capacitor; and
an inverter having an input coupled to the output of the first capacitor.

### Claim 16 (depends on 11)

The system of claim 11, further comprising:
a pair of capacitors, wherein each of the capacitors is coupled between a respective one of the amplifying transistors and the transmission lines.

### Claim 17 (depends on 12)

The system of claim 12, wherein the amplifying transistors are lateral bipolar transistors, the voltage headroom circuit includes first and second P-channel transistors with a gate of the first P-channel transistor coupled to a drain of the second P-channel transistor, and a gate of the second P-channel transistor coupled to a drain of the first P-channel transistor.

### Claim 18 (depends on 12)

The system of claim 12, further comprising:
a charge pump coupled to provide a first voltage to the voltage headroom circuit, wherein the first voltage is greater than a supply voltage provided to the amplifying transistors.

### Claim 19

A method of repeating a transmitted signal comprising:
receiving a pair of differential signals from a driver circuit;
generating amplified signals by amplifying the differential signals using respective cascoded amplifying transistors, wherein headroom voltage coupled to a current electrode of each of the amplifying transistors is greater than a supply voltage coupled to gates of the amplifying transistors and the differential signals are capacitively coupled to the cascoded amplifying transistors; and
adjusting voltage levels of the amplified signals to the supply voltage.

### Claim 20

(canceled)