# US 2014/0197846 A1 · Detecting apparatus, wafer and electronic device

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- Number: US 2014/0197846 A1
- Document ID: US20140197846A1
- Status: Published application
- Kind: A1
- Application number: 13/752,410
- Filed: 2013-01-29
- Published: 2014-07-17
- Earliest claimed: 2013-01-11
- Assignees: The University of Tokyo; Advantest Corporation
- Applicants: Advantest Corporation; The University of Tokyo
- Inventors: Takahiro YAMAGUCHI; Satoshi KOMATSU; Kunihiro ASADA; James Sumit TANDON
- Web page: https://patentgrep.com/patent/US20140197846A1

## CPC

- H10P 74/277: {Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers}
- G01R 31/2894: {Aspects of quality control [QC] (G01R31/31718 takes precedence; program control for QC G05B19/41875)}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

Provided is a detection apparatus that detects process variation in a plurality of comparators that each output a comparison result obtained by comparing a signal level of an input signal to a reference level, the detection apparatus comprising a signal input section that inputs the input signal and the reference level in common to the comparators, and sequentially changes the signal level of the input signal; and a detecting section that detects, for each signal level, a number of comparison results that indicate a predetermined result, from among the comparison results of the comparators, and detects the process variation based on a distribution of the number of comparison results that indicate the predetermined result.

## Claims

### Claim 1

A detection apparatus that detects process variation in a plurality of comparators that each output a comparison result obtained by comparing a signal level of an input signal to a reference level, the detection apparatus comprising:
a signal input section that inputs the input signal and the reference level in common to the comparators, and sequentially changes the signal level of the input signal; and
a detecting section that detects, for each signal level, a number of comparison results that indicate a predetermined result, from among the comparison results of the comparators, and detects the process variation based on a distribution of the number of comparison results that indicate the predetermined result.

### Claim 2 (depends on 1)

The detection apparatus according to claim 1, wherein
the comparators each include a transistor, and
the detecting section detects the variation in threshold voltages of the transistors.

### Claim 3 (depends on 2)

The detection apparatus according to claim 2, wherein
the comparators each include a CMOS circuit at an input stage,
the signal input section sequentially changes the signal level of the input signal in each of an allowable input range for nMOS transistors of the CMOS circuit that does not overlap with an allowable input range for pMOS transistors of the CMOS circuit and an allowable input range for the pMOS transistors that does not overlap with the allowable input range for the nMOS transistors, and
the detecting section detects the variation in the threshold voltages of the nMOS transistors based on a distribution of the number of comparison results that indicate the predetermined result when the signal level of the input signal is sequentially changed within the allowable input range of the nMOS transistors, and detects the variation in the threshold voltages of the pMOS transistors based on a distribution of the number of comparison results that indicate the predetermined result when the signal level of the input signal is sequentially changed within the allowable input range of the pMOS transistors.

### Claim 4 (depends on 3)

The detection apparatus according to claim 3, wherein
the signal input section sequentially changes the signal level of the input signal within a range where the allowable input range of the nMOS transistors and the allowable input range of the pMOS transistors overlap, and
the detecting section detects variation of input offsets of the comparators based on a distribution of the number of comparison results that indicate the predetermined result when the signal level of the input signal is sequentially changed within the range where the allowable input range of the nMOS transistors and the allowable input range of the pMOS transistors overlap.

### Claim 5

(canceled)

### Claim 6 (depends on 1)

The detection apparatus according to claim 1, wherein
the signal input section inputs a DC input signal to the comparators.

### Claim 7 (depends on 1)

The detection apparatus according to claim 1, wherein
the detection apparatus controls the number of comparators, from among the plurality of comparators, that undergo the process variation detection.

### Claim 8

A wafer comprising:
a plurality of comparators that each output a comparison result obtained by comparing a signal level of a common input signal to a common reference level; and
a combining output section that combines the comparison results output by the comparators in response to the input signal, and outputs the resulting combination.

### Claim 9 (depends on 8)

The wafer according to claim 8, further comprising a signal input section that inputs the input signal and the reference level in common to the comparators, and sequentially changes the signal level of the input signal.

### Claim 10 (depends on 9)

The wafer according to claim 9, further comprising
a detecting section that detects, for each signal level, a number of comparison results that indicate a predetermined result, from among the comparison results of the comparators, and detects process variation of the comparators based on a distribution of the number of comparison results that indicate the predetermined result.

### Claim 11

An electronic device comprising:
a plurality of comparators that each output a comparison result obtained by comparing a signal level of a common input signal to a common reference level; and
a combining output section that combines the comparison results output by the comparators in response to the input signal, and outputs the resulting combination.

### Claim 12 (depends on 11)

The electronic device according to claim 11, further comprising a signal input section that inputs the input signal and the reference level in common to the comparators, and sequentially changes the signal level of the input signal.

### Claim 13 (depends on 12)

The electronic device according to claim 12, further comprising
a detecting section that detects, for each signal level, a number of comparison results that indicate a predetermined result, from among the comparison results of the comparators, and detects process variation of the comparators based on a distribution of the number of comparison results that indicate the predetermined result.