# US 2014/0197812 A1 · Constant on time control circuit and dc-dc converting circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0197812 A1 - Document ID: US20140197812A1 - Status: Published application - Kind: A1 - Application number: 13/893,333 - Filed: 2013-05-13 - Published: 2014-07-17 - Earliest claimed: 2013-01-11 - Assignees: Green Solution Technology Co., Ltd. - Applicants: Green Solution Technology Co., Ltd. - Inventors: Li-Min LEE; Chao SHAO; Shian-Sung SHIU; Quan GAN - Web page: https://patentgrep.com/patent/US20140197812A1 ## CPC - H02M 3/1563: {without using an external clock (H02M3/158 takes precedence)} - H02M 1/143: {using compensating arrangements (for reducing noise from the supply in transmission systems H04B15/005)} - H02M 1/0019: {the disturbance parameters being load current fluctuations} - H02M 3/1588: {comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence)} - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract A constant on time control circuit, configured to control a converting circuit to transform an input voltage into a stable output voltage, is disclosed. The constant on time control circuit comprises a comparing circuit and a logic circuit. The comparing circuit compares a reference signal and a voltage signal indicative of the output voltage and accordingly outputs a compared result signal. The logic circuit periodically controls the converting circuit to perform voltage transformation and makes a time period of a duty cycle in every cycle being substantially constant. A start point in time of every cycle is determined according to the compared result signal. The comparing circuit comprises a differential pair, a base current source and an extra current source. The base current source provides a bias current to the differential pair. The extra current source provides a substantial ramp current to one channel in the differential pair. ## Claims ### Claim 1 A constant on time control circuit, adapted to control a converting circuit to transform an input voltage into an output voltage, comprising: a comparing circuit, comparing a reference signal and a voltage signal indicative of the output voltage and accordingly outputting a compared result signal; and a logic circuit, periodically controlling the converting circuit to perform the voltage transformation and make a time period of a duty cycle in every cycle being substantially constant, wherein a start point in time of every cycle is determined according to the compared result signal; wherein, the comparing circuit has a differential pair, a base current source and an extra current source, the base current source provides a bias current for the differential pair which compares the reference signal and the voltage signal to output the compared result signal and the ex tea current source provides a substantial ramp current to one channel in the differential pair. ### Claim 2 (depends on 1) The constant on time control circuit according to claim 1, wherein the converting circuit is a buck converting circuit which comprises an upper transistor and a lower transistor, and the substantial ramp current is provided according to one of the followings: a. being increased with time when the upper transistor is turned on, and being reduced with time when the upper transistor is cut off; b. in response to an electric potential of a connection node of the upper transistor and the lower transistor; c. in response to a current flowing through an inductance of an LC filter of the buck converting circuit; and d. in response to the input voltage and the output voltage. ### Claim 3 (depends on 1) The constant on time control circuit according to claim 1, wherein an absolute value of a slope of the substantial ramp current is increased with time over a predetermined period or a predetermined percentage of every cycle before an end point in time of every cycle. ### Claim 4 (depends on 3) The constant on time control circuit according to claim 3, wherein the extra current source comprises a capacitance, a charging current source, a discharging current source and a transconductance circuit, the charging current source is configured to charge the capacitance, the discharging current source is configured to discharge the capacitance, and the transconductance circuit generates the substantial ramp current according to a voltage of the capacitance. ### Claim 5 (depends on 4) The constant on time control circuit according to claim 4, wherein a current of the discharging current source is determined according to the voltage of the capacitance. ### Claim 6 (depends on 2) The constant on time control circuit according to claim 2, wherein an absolute value of a slope of the substantial ramp current is increased with time over a predetermined period or a predetermined percentage of every cycle before an end point in time of every cycle. ### Claim 7 (depends on 6) The constant on time control circuit according to claim 6, wherein the extra current source comprises a capacitance, a charging current source, a discharging current source and a transconductance circuit, the charging current source is configured to charge the capacitance, the discharging current source is configured to charge discharge the capacitance, and the transconductance circuit generates the substantial ramp current according to a voltage of the capacitance. ### Claim 8 (depends on 7) The constant on time control circuit according to claim 7, wherein a current of the discharging current source is determined according to the voltage of the capacitance. ### Claim 9 A DC to DC converting circuit, comprising: a switching module, coupled to an input voltage; an LC filter, coupled to the switching module and outputting an output voltage; and a control circuit, periodically controlling the switching module and transferring an electrical power of the input voltage to the LC filter, wherein the control circuit comprises a comparing circuit which compares a reference signal and a voltage signal indicative of the output voltage and accordingly outputs a compared result signal for determining a start point in time of every cycle; wherein, the comparing circuit has a differential pair, and one channel of the differential pair is coupled to an extra current source to receive a substantial ramp current. ### Claim 10 (depends on 9) The DC to DC converting circuit according to claim 9, wherein an absolute value of a slope of the substantial ramp current is increased with time over a predetermined period or a predetermined percentage of every cycle before an end point in time of every cycle. ### Claim 11 (depends on 9) The DC to DC converting circuit according to claim 9, wherein the DC to DC converting circuit is a buck converting circuit which comprises an upper transistor and a lower transistor, and the substantial ramp current is provided according to one of the followings: a. being increased with time when the upper transistor is turned on, and being reduced with time when the upper transistor is cut off; b. in response to an electric potential of a connection node of the upper transistor and the lower transistor; c. in response to a current flowing through an inductance of the LC filter of the buck converting circuit; and d. in response to the input voltage and the output voltage. ### Claim 12 The DC to DC converting circuit according to chum 11, wherein an absolute value of a slope of the substantial ramp current is increased with time over a predetermined period or a predetermined percentage of every cycle before an end point in time of every cycle.