# US 2014/0197548 A1 · Integrated circuit packaging system with molded grid-array mechanism and method of manufacture thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0197548 A1 - Document ID: US20140197548A1 - Status: Published application - Kind: A1 - Application number: 13/740,151 - Filed: 2013-01-11 - Published: 2014-07-17 - Earliest claimed: 2013-01-11 - Assignees: STATS ChipPAC, Ltd. - Inventors: Byung Tai Do; Arnel Senosa Trasporto; Linda Pei Ee Chua - Web page: https://patentgrep.com/patent/US20140197548A1 ## CPC - H10W 74/01: Manufacture or treatment - H10W 70/042: {Etching} - H10W 70/415: {Leadframe inner leads serving as die pads} - H10W 70/457: {of metallic layers on leadframes} - H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills} - H10W 74/016: {using moulds} - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 90/00: Package configurations - H10W 72/884: {Die-attach connectors and bond wires} - H10W 90/732: {between stacked chips} - H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A method of manufacture of an integrated circuit packaging system includes: providing a lead-frame having a metal connector mounted thereon and having a peripheral mounting region; forming an insulation cover on the lead-frame and on the metal connector; connecting an integrated circuit die over the insulation cover; forming a top encapsulation on the integrated circuit die with the peripheral mounting region exposed from the top encapsulation; forming a routing layer, having a conductive land, from the lead-frame; and forming a bottom encapsulation partially encapsulating the routing layer and the insulation cover. ## Claims ### Claim 1 A method of manufacture of an integrated circuit packaging system comprising: providing a lead-frame having a metal connector mounted thereon and having a peripheral mounting region; forming an insulation cover on the lead-frame and on the metal connector; connecting an integrated circuit die over the insulation cover; forming a top encapsulation on the integrated circuit die with the peripheral mounting region exposed from the top encapsulation; forming a routing layer, having a conductive land, from the lead-frame; and forming a bottom encapsulation partially encapsulating the routing layer and the insulation cover. ### Claim 2 (depends on 1) The method as claimed in claim 1 wherein forming the top encapsulation includes forming the top encapsulation with a top chip surface of the integrated circuit die exposed from the top encapsulation. ### Claim 3 (depends on 1) The method as claimed in claim 1 wherein forming the bottom encapsulation includes forming the bottom encapsulation encapsulating a lateral edge of the metal connector. ### Claim 4 (depends on 1) The method as claimed in claim 1 further comprising: mounting a further die on the integrated circuit die; and wherein: forming the top encapsulation includes forming the top encapsulation on the further die. ### Claim 5 (depends on 1) The method as claimed in claim 1 further comprising mounting a stacked package, having a stack interconnect, over the top encapsulation, the stack interconnect mounted to the metal connector. ### Claim 6 A method of manufacture of an integrated circuit packaging system comprising: providing a lead-frame having a metal connector mounted thereon and having a peripheral mounting region; forming an insulation cover on the lead-frame and on the metal connector; connecting an integrated circuit die over the insulation cover; forming an under-fill between the integrated circuit die and the insulation cover; forming a top encapsulation on the integrated circuit die with the peripheral mounting region exposed from the top encapsulation; forming a routing layer, having a conductive land, from the lead-frame; and forming a bottom encapsulation partially encapsulating the routing layer and the insulation cover. ### Claim 7 (depends on 6) The method as claimed in claim 6 further comprising forming a connection opening in the insulation cover for exposing a portion of the metal connector. ### Claim 8 (depends on 6) The method as claimed in claim 6 wherein forming the bottom encapsulation includes forming the bottom encapsulation coplanar to a bottom cover of the conductive land. ### Claim 9 (depends on 6) The method as claimed in claim 6 wherein forming the bottom encapsulation includes forming the bottom encapsulation isolated from the top encapsulation. ### Claim 10 (depends on 6) The method as claimed in claim 6 wherein connecting the integrated circuit die includes connecting a flip chip. ### Claim 11 An integrated circuit packaging system comprising: a routing layer having a conductive land, a metal connector, and a peripheral mounting region, the metal connector on the conductive land; an insulation cover on the routing layer; an integrated circuit die mounted over the insulation cover; a top encapsulation encapsulating the integrated circuit die with the peripheral mounting region exposed from the top encapsulation; and a bottom encapsulation partially encapsulating the routing layer and the insulation cover. ### Claim 12 (depends on 11) The system as claimed in claim 11 wherein the integrated circuit die includes a top chip surface exposed from the top encapsulation. ### Claim 13 (depends on 11) The system as claimed in claim 11 wherein the bottom encapsulation encapsulates a lateral edge of the metal connector. ### Claim 14 (depends on 11) The system as claimed in claim 11 further comprising: a further die mounted on the integrated circuit die; and wherein: the top encapsulation encapsulates the further die. ### Claim 15 (depends on 11) The system as claimed in claim 11 further comprising a stacked package, having a stacked interconnect, over the top encapsulation, the stack interconnect mounted to the metal connector. ### Claim 16 (depends on 11) The system as claimed in claim 11 further comprising an under-fill between the integrated circuit die and the insulation cover. ### Claim 17 (depends on 16) The system as claimed in claim 16 wherein the insulation cover includes a connection opening for exposing a portion of the metal connector. ### Claim 18 (depends on 16) The system as claimed in claim 16 wherein the bottom encapsulation is coplanar with a bottom cover of the conductive land. ### Claim 19 (depends on 16) The system as claimed in claim 16 wherein the bottom encapsulation is isolated from the top encapsulation. ### Claim 20 (depends on 16) The system as claimed in claim 16 wherein the integrated circuit die is a flip chip.