# US 2014/0197541 A1 · Microelectronic assembly having a heat spreader for a plurality of die

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- Number: US 2014/0197541 A1
- Document ID: US20140197541A1
- Status: Published application
- Kind: A1
- Application number: 13/741,743
- Filed: 2013-01-15
- Published: 2014-07-17
- Earliest claimed: 2013-01-15
- Assignees: Freescale Semiconductor, Inc.
- Applicants: Freescale Semiconductor, Inc.
- Inventors: Tab A. STEPHENS; Michael B. McSHANE; Perry H. PELLEY
- Web page: https://patentgrep.com/patent/US20140197541A1

## CPC

- H10W 90/00: Package configurations
- H10P 50/264: {by chemical means}
- H10P 52/403: {of conductive or resistive materials}
- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 40/00: Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60)
- H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections
- H10W 40/228: {the projecting parts being wire-shaped or pin-shaped}
- H10W 72/90: Bond pads, in general
- H10W 74/134: {the encapsulations being in grooves in the semiconductor body}
- H10W 72/01225: {in solid form, e.g. by using a powder or by stud bumping}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/07254: {changes in dispositions}
- H10W 72/242: {relative to the surface, e.g. recessed, protruding}
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/253: {not comprising solid metals or solid metalloids, e.g. polymers or ceramics}
- H10W 72/281: {Auxiliary members}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/354: {comprising polymers}
- H10W 72/981: {Auxiliary members, e.g. spacers}
- H10W 90/20: Configurations of stacked chips
- H10W 90/288: {characterised by arrangements for thermal management of the stacked chips}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/726: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A microelectronic assembly (100) and a microelectronic device (4100) include a stacked structure (101). The stacked structure includes a heat spreader (104), at least one die (106) thermally coupled to at least a portion of one side of the heat spreader, at least one other die (108) thermal coupled to at least a portion of an opposite side of the heat spreader, at least one opening (401) in the heat spreader located in a region of between the two die, an insulator (603) disposed in the at least one opening, and electrically conductive material (1308, 1406) in an insulated hole (705) in the insulator. The heat spreader allows electrical communication between the two die through the opening while the insulator isolates the electrically conductive material and the heat spreader from each other.

## Claims

### Claim 1

A microelectronic assembly, comprising:
a heat spreader having a first major surface and a second major surface opposite the first major surface;
at least one die located with respect to the first major surface of the heat spreader and thermally coupled to at least a portion of the heat spreader;
at least one other die located with respect to the second major surface of the heat spreader and thermally coupled to at least a portion of the heat spreader;
an opening in the heat spreader, the opening located in a region of the heat spreader between the at least one die and the at least one other die;
an insulator located in the opening; and
electrically conductive material located in an electrically insulated through hole in the insulator,
wherein the insulator electrically isolates the electrically conductive material and the heat spreader from each other.

### Claim 2 (depends on 1)

The microelectronic assembly of claim 1, wherein the at least one die and the at least one other die are electrically coupled by the electrically conductive material in the electrically insulated through hole in the insulator disposed in the opening of the heat spreader.

### Claim 3 (depends on 1)

The microelectronic assembly of claim 1, wherein the heat spreader comprises an electrically conductive material.

### Claim 4 (depends on 3)

The microelectronic assembly of claim 3, wherein the heat spreader and the electrically conductive material in the electrically insulated through hole in the insulator includes a same material.

### Claim 5 (depends on 1)

The microelectronic assembly of claim 1, wherein the electrically conductive material in the electrically insulated through hole in the insulator is one of a conductive epoxy and a B-staged conductive polymer.

### Claim 6 (depends on 1)

The microelectronic assembly of claim 1, wherein the electrically conductive material in the electrically insulated through hole is solder.

### Claim 7 (depends on 1)

The microelectronic assembly of claim 1, wherein the insulator is one of silicon dioxide, silicon nitride, and a non-electrically conductive polymer.

### Claim 8 (depends on 1)

The microelectronic assembly of claim 1, wherein the at least one die includes an active side that faces the first major surface of the heat spreader, and wherein the at least one other die includes an active side that faces the second major surface of the heat spreader.

### Claim 9 (depends on 1)

The microelectronic assembly of claim 1, wherein the at least one die and the at least one other die each includes at least one through via and an electrically conductive substance therein, and wherein the electrically conductive material in the electrically insulated through hole of the heat spreader is coupled to the electrically conductive substance in the through via of the at least one die and to the electrically conductive substance in the through via of the at least one other die.

### Claim 10 (depends on 9)

The microelectronic assembly of claim 9, wherein at least a portion of the through via of the at least one die, at least a portion of the electrically insulated through hole in the heat spreader, and at least a portion of the through via of the at least one other die, are aligned.

### Claim 11 (depends on 1)

The microelectronic assembly of claim 1, wherein one or both of the at least one die and the at least one other die each comprises a stack of die.

### Claim 12

A method of manufacturing a microelectronic device, comprising:
providing a heat spreader having a first major surface and a second major surface opposite the first major surface, wherein the heat spreader has an opening, an insulator in the opening, an electrically insulated through hole in the insulator, and electrically conductive material in the electrically insulated through hole;
providing a first die and a second die, each die having a through via and an electrically conductive substance therein;
thermally coupling the first die to at least a portion of the first major surface of the heat spreader, the portion including the opening, wherein the first die is located with respect to the first major surface of the heat spreader; and
thermally coupling the second die to at least a portion of the second major surface of the heat spreader, the portion including the opening, wherein the second die is located with respect to the second major surface of the heat spreader,
wherein the electrically conductive material in the electrically insulated through hole of the heat spreader is coupled to the electrically conductive substance in the through via of the at least one die and to the electrically conductive substance in the through via of the at least one other die.

### Claim 13 (depends on 12)

The method of manufacturing a microelectronic device of claim 12, including a plurality of flip chip bumps, at least one flip chip bump of the plurality of flip chip bumps electrically coupled to a through via of one or both of the first die and the second die.

### Claim 14 (depends on 12)

The method of manufacturing a microelectronic device of claim 12, including a step of disposing electrically conductive material in the electrically insulated through hole.

### Claim 15 (depends on 14)

The method of manufacturing a microelectronic device of claim 14, wherein the step of disposing electrically conductive material in the electrically insulated through hole comprises placing a solder ball at the electrically insulated through hole prior to thermally coupling the at least a second die to the at least a portion of the second major surface of the heat spreader.

### Claim 16 (depends on 14)

The method of manufacturing a microelectronic device of claim 14, wherein the step of disposing electrically conductive material in the electrically insulated through hole comprises filling the electrically insulated through hole in the heat spreader, filling the through via of the at least a first die and filling the through via of the at least a second die with an electrically conductive continuous fill material in a continuous process subsequent to thermally coupling the at least a second die to the at least a portion of the second major surface of the heat spreader.

### Claim 17

A method of manufacturing a microelectronic assembly, comprising:
providing a first die having at least one through via, the at least one through via having an electrically insulating lining and an electrically conductive substance therein, wherein a thermally conductive material is located on a surface of the first die and thermally coupled to the first die, the thermally conductive material defining an opening in the thermally conductive material, and wherein a dielectric material is located in the opening, the dielectric material defining a hole in the dielectric material, the hole including an electrically conductive material; and
thermally coupling a second die to the thermally conductive material located on the surface of the first die, the second die having at least one through via, the at least one having an electrically insulating lining, the at least one through via having an electrically conductive substance within the electrically insulating lining,
wherein the electrically conductive material in the hole is electrically coupled to the electrically conductive substance in the through via of the first die and to the electrically conductive substance in the through via of the second die.

### Claim 18 (depends on 17)

The method of manufacturing a microelectronic assembly of claim 17, wherein the step of providing a first die includes:
depositing a dielectric material onto the first die;
removing the dielectric material from a portion from the first die wherein the removing leaves dielectric material that is near the at least one through via;
depositing a metal onto the first die, including on the dielectric material, the metal forming a heat spreader;
removing metal from the first die until the dielectric material is exposed;
removing a center portion of the dielectric until the electrically conductive substance within the electrically insulating lining is exposed; and
placing electrically conductive material in the hole of the dielectric material.

### Claim 19 (depends on 18)

The method of manufacturing a microelectronic assembly of claim 18, wherein the step of depositing a metal onto the first die comprises depositing copper onto the first die.

### Claim 20 (depends on 19)

The method of manufacturing a microelectronic assembly of claim 19, wherein the step of removing metal includes removing the copper by one of polishing, etchback, and chemical mechanical planarization.