# US 2014/0197499 A1 · Self Aligned Contact Formation

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- Number: US 2014/0197499 A1
- Document ID: US20140197499A1
- Status: Published application
- Kind: A1
- Application number: 13/743,523
- Filed: 2013-01-17
- Published: 2014-07-17
- Earliest claimed: 2013-01-17
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Neng-Kuo Chen; Shao-Ming Yu; Gin-Chen Huang; Chia-Jung Hsu; Sey-Ping Sun; Clement Hsingjen Wann
- Web page: https://patentgrep.com/patent/US20140197499A1

## CPC

- H10W 20/43: Layouts of interconnections
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/661: {the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation (having lateral variation in the gate structure H10D64/671)}
- H10D 84/83: of only insulated-gate FETs [IGFET]
- H10P 14/6905: {being a silicon carbide or silicon carbonitride and not containing oxygen, e.g. SiC or SiC:H}
- H10W 20/069: {by forming self-aligned vias or self-aligned contact plugs}
- H10W 20/4441: {the principal metal being a refractory metal}
- Y10S 438/975: Substrate or mask aligning feature
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

The present disclosure relates to methods of forming a self-aligned contact and related apparatus. In some embodiments, the method forms a plurality of gate lines interspersed between a plurality of dielectric lines, wherein the gate lines and the dielectric lines extend in a first direction over an active area. One or more of the plurality of gate lines are into a plurality of gate line sections aligned in the first direction. One or more of the plurality of dielectric lines are cut into a plurality of dielectric lines sections aligned in the first direction. A dummy isolation material is deposited between adjacent dielectric sections in the first direction and between adjacent gate line sections in the first direction. One or more self-aligned metal contacts are then formed by replacing a part of one or more of the plurality of dielectric lines over the active area with a contact metal.

## Claims

### Claim 1

A method of forming a self-aligned contact, comprising:
forming a plurality of gate lines interspersed between a plurality of dielectric lines, wherein the gate lines and the dielectric lines extend in a first direction over an active area;
cutting one or more of the plurality of gate lines into a plurality of gate line sections aligned in the first direction;
cutting one or more of the plurality of dielectric lines into a plurality of dielectric lines sections aligned in the first direction;
depositing a dummy isolation material between adjacent dielectric sections in the first direction and between adjacent gate line sections in the first direction; and
forming one or more self-aligned metal contacts by replacing a part of one or more of the plurality of dielectric lines over the active area with a contact metal.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
forming one or more sidewall spacers to abut the gate lines, wherein the one or more sidewall spacers are formed between the gate lines and the dielectric lines in a second direction perpendicular to the first direction.

### Claim 3 (depends on 1)

The method of claim 1, wherein cutting one or more of the plurality of gate lines, comprises:
patterning a first masking layer to form one or more openings above the gate lines at positions not above the active area;
selectively etching the gate lines according to the first masking layer to form one or more cavities in the gate lines; and
depositing the dummy isolation material in the one or more cavities in the gate lines.

### Claim 4 (depends on 3)

The method of claim 3, wherein the first masking layer comprises:
a silicon carbon nitride (SiCN) layer disposed on the gate lines; and
a photoresist layer disposed on the SiCN layer.

### Claim 5 (depends on 3)

The method of claim 3, wherein cutting one or more of the plurality of dielectric lines, comprises:
patterning a second masking layer to form one or more openings above the dielectric lines at positions not above the active area;
selectively etching the dielectric lines according to the second masking layer to form one or more cavities in the dielectric lines; and
depositing the dummy isolation material in the one or more cavities in the dielectric lines.

### Claim 6 (depends on 5)

The method of claim 5, wherein replacing dielectric lines with self-aligned metal contacts, comprises:
patterning a third masking layer to form one or more openings above the dielectric lines at positions above the active area;
selectively etching the dielectric lines according to the third masking layer to form one or more contact holes in the dielectric lines; and
depositing the contact metal in the one or more contact holes.

### Claim 7 (depends on 1)

The method of claim 1, wherein the plurality of gate lines comprise sacrificial gate lines.

### Claim 8 (depends on 7)

The method of claim 7, further comprising:
selectively etching the sacrificial gate lines in a position above the active area to form one or more gate cavities; and
depositing a replacement gate material to fill the one or more gate cavities.

### Claim 9 (depends on 8)

The method of claim 8, wherein the replacement gate material comprises a high-k or metal gate material.

### Claim 10 (depends on 1)

The method of claim 1, wherein the dummy isolation material comprises silicon carbon nitride (SiCN).

### Claim at position 11

11-20. (canceled)

### Claim 21

A method of forming a self-aligned contact, comprising:
forming a plurality of gate lines interspersed between a plurality of dielectric lines, wherein the gate lines and the dielectric lines extend over first and second active areas;
cutting one or more of the plurality of dielectric lines at a first plurality of positions between the first and second active areas to form a plurality of disjoint dielectric line sections separated by a first plurality of cuts;
cutting one or more of the plurality of gate lines at a second plurality of positions between the first and second active areas to form a plurality of disjoint gate line sections separated by a second plurality of cuts;
depositing a dummy isolation material within the first and second plurality of cuts; and
replacing a part of one or more of the plurality of dielectric lines over the first and second active areas with a contact metal to form one or more self-aligned metal contacts disposed between two of the plurality of gate lines.

### Claim 22 (depends on 21)

The method of claim 21, wherein cutting one or more of the plurality of gate lines, comprises:
patterning a first masking layer to form one or more openings above the one or more of the plurality of gate lines at the second plurality of positions;
selectively etching the gate lines according to the first masking layer to form one or more cavities in the gate lines; and
depositing the dummy isolation material in the one or more cavities in the gate lines.

### Claim 23 (depends on 21)

The method of claim 21, wherein cutting one or more of the plurality of dielectric lines, comprises:
patterning a second masking layer to form one or more openings above the one or more of the plurality of dielectric lines at the first plurality of positions;
selectively etching the dielectric lines according to the second masking layer to form one or more cavities in the dielectric lines; and
depositing the dummy isolation material in the one or more cavities in the dielectric lines.

### Claim 24 (depends on 21)

The integrated chip of claim 21, wherein the plurality of gate lines comprise a high-k gate material or a metal gate material.

### Claim 25 (depends on 21)

The method of claim 21, wherein replacing the part of the one or more of the plurality of dielectric lines with a contact metal, comprises:
patterning a third masking layer to form one or more openings above the part of the one or more of the plurality of disjoint dielectric line sections at a third plurality of positions over the first and second active areas;
selectively etching the plurality of disjoint dielectric line sections according to the third masking layer to form one or more contact holes in the dielectric lines; and
depositing the contact metal in the one or more contact holes.

### Claim 26 (depends on 21)

The method of claim 21, wherein the plurality of gate lines comprise sacrificial gate lines.

### Claim 27 (depends on 26)

The method of claim 26, further comprising:
selectively etching the sacrificial gate lines in a fourth plurality of positions over the first and second active areas to form one or more gate cavities; and
depositing a replacement gate material to fill the one or more gate cavities.

### Claim 28

A method of forming a self-aligned contact, comprising:
forming a plurality of sacrificial gate lines on a semiconductor substrate, wherein the plurality of sacrificial gate lines extend over an active area in a first direction;
forming a plurality of dielectric lines interspersed between the plurality of sacrificial gate lines on the semiconductor substrate;
selectively cutting the sacrificial gate lines and the dielectric lines at a position external to the active area to form a plurality of cuts;
depositing a dummy isolation material into the plurality of cuts; and
replacing a part of the plurality of dielectric lines with self-aligned metal contacts above the active area.

### Claim 29 (depends on 28)

The method of claim 28, wherein replacing the part of the plurality of dielectric lines with the self-aligned metal contacts, comprises:
patterning a masking layer to form one or more openings above the dielectric lines at positions above the active area;
selectively etching the dielectric lines according to the masking layer to form one or more contact holes in the dielectric lines; and
depositing a contact metal in the one or more contact holes.

### Claim 30 (depends on 28)

The method of claim 28, wherein the plurality of gate lines comprise sacrificial gate lines.