# US 2014/0197421 A1 · Electrode configurations for semiconductor devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0197421 A1 - Document ID: US20140197421A1 - Status: Published application - Kind: A1 - Application number: 14/211,104 - Filed: 2014-03-14 - Published: 2014-07-17 - Earliest claimed: 2011-03-04 - Assignees: Transphorm Inc. - Applicants: Transphorm Inc. - Inventors: Yuvaraj Dora; Yifeng Wu - Web page: https://patentgrep.com/patent/US20140197421A1 ## CPC - H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT] - H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) - H10D 8/01: Manufacture or treatment - H10D 8/051: {of Schottky diodes} - H10D 12/031: {of IGBTs} - H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT} - H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs} - H10D 62/8325: {Silicon carbide} - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - H10D 64/0124: {to Group III-V semiconductors} - H10D 64/23: Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes - H10D 64/411: {for FETs} - H10P 14/40: of conductive or resistive materials - H10W 20/082: {the openings being tapered via holes} - H10D 8/60: Schottky-barrier diodes - H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A III-N semiconductor device can include an electrode-defining layer having a thickness on a surface of a III-N material structure. The electrode-defining layer has a recess with a sidewall, the sidewall comprising a plurality of steps. A portion of the recess distal from the III-N material structure has a first width, and a portion of the recess proximal to the III-N material structure has a second width, the first width being larger than the second width. An electrode is in the recess, the electrode including an extending portion over the sidewall of the recess. A portion of the electrode-defining layer is between the extending portion and the III-N material structure. The sidewall forms an effective angle of about 40 degrees or less relative to the surface of the III-N material structure. ## Claims ### Claim 1 A III-N semiconductor device, comprising: an electrode-defining layer having a thickness on a surface of a III-N material structure, the electrode-defining layer having a recess with a sidewall, the sidewall comprising a plurality of steps, wherein a portion of the recess distal from the III-N material structure has a first width, and a portion of the recess proximal to the III-N material structure has a second width, the first width being larger than the second width; and an electrode in the recess, the electrode including an extending portion over the sidewall, a portion of the electrode-defining layer being between the extending portion and the III-N material structure; wherein at least one of the steps in the sidewall has a first surface that is substantially parallel to the surface of the III-N material structure and a second surface that is slanted; and the sidewall forms an effective angle of about 40 degrees or less relative to the surface of the III-N material structure. ### Claim 2 (depends on 1) The device of claim 1, wherein the III-N material structure comprises a first III-N material layer, a second III-N material layer, and a 2DEG channel induced in the first III-N material layer adjacent to the second III-N material layer as a result of a compositional difference between the first III-N material layer and the second III-N material layer. ### Claim 3 (depends on 2) The device of claim 2, wherein the first III-N material layer includes GaN. ### Claim 4 (depends on 3) The device of claim 3, wherein the second III-N material layer includes AlGaN or AlInGaN. ### Claim 5 (depends on 2) The device of claim 2, further including a third III-N material layer between the first III-N material layer and the second III-N material layer. ### Claim 6 (depends on 5) The device of claim 5, wherein the third III-N material layer comprises AlN. ### Claim 7 (depends on 2) The device of claim 2, wherein the first III-N material layer and the second III-N material layer are group-III terminated semipolar layers, and the second III-N material layer is between the first III-N material layer and the electrode-defining layer. ### Claim 8 (depends on 2) The device of claim 2, wherein the first III-N material layer and the second III-N material layer are N-face or [0 0 0 1bar] oriented or nitrogen-terminated semipolar layers, and the first III-N material layer is between the second III-N material layer and the electrode-defining layer. ### Claim 9 (depends on 2) The device of claim 2, wherein the recess extends through the entire thickness of the electrode-defining layer. ### Claim 10 (depends on 9) The device of claim 9, wherein the recess extends into the III-N material structure. ### Claim 11 (depends on 10) The device of claim 10, wherein the recess extends through the 2DEG channel. ### Claim 12 (depends on 10) The device of claim 10, wherein the recess extends at least 30 nanometers into the III-N material structure. ### Claim 13 (depends on 1) The device of claim 1, wherein the second surface forms an angle of between 5 and 85 degrees with the surface of the III-N material structure. ### Claim 14 (depends on 1) The device of claim 1, wherein the recess extends partially through the thickness of the electrode-defining layer. ### Claim 15 (depends on 1) The device of claim 1, wherein the electrode-defining layer has a composition that is substantially uniform throughout. ### Claim 16 (depends on 1) The device of claim 1, wherein the electrode-defining layer comprises SiNx. ### Claim 17 (depends on 1) The device of claim 1, wherein a thickness of the electrode-defining layer is between about 0.1 microns and 5 microns. ### Claim 18 (depends on 1) The device of claim 1, further comprising a dielectric passivation layer between the III-N material structure and the electrode-defining layer, the dielectric passivation layer directly contacting a surface of the III-N material adjacent to the electrode. ### Claim 19 (depends on 18) The device of claim 18, wherein the dielectric passivation layer comprises SiNx. ### Claim 20 (depends on 18) The device of claim 18, wherein the dielectric passivation layer is between the electrode and the III-N material structure, such that the electrode does not directly contact the III-N material structure. ### Claim 21 (depends on 18) The device of claim 18, further comprising an additional insulating layer between the dielectric passivation layer and the electrode-defining layer. ### Claim 22 (depends on 21) The device of claim 21, wherein the additional insulating layer comprises AlN. ### Claim 23 (depends on 21) The device of claim 21, wherein the additional insulating layer is less than about 20 nanometers thick. ### Claim 24 (depends on 1) The device of claim 1, wherein the extending portion of the electrode functions as a field plate. ### Claim 25 (depends on 1) The device of claim 1, wherein the electrode is an anode, and the device is a diode. ### Claim 26 (depends on 1) The device of claim 1, wherein the electrode is a gate, and the device is a transistor. ### Claim 27 (depends on 26) The device of claim 26, wherein the device is an enhancement-mode device. ### Claim 28 (depends on 26) The device of claim 26, wherein the device is a depletion-mode device. ### Claim 29 (depends on 1) The device of claim 1, wherein the device is a high-voltage device. ### Claim 30 (depends on 1) The device of claim 1, wherein the effective angle is about 20 degrees or less, and a breakdown voltage of the device is about 100V or larger. ### Claim 31 (depends on 1) The device of claim 1, wherein the effective angle is about 10 degrees or less, and a breakdown voltage of the device is about 300V or larger. ### Claim 32 (depends on 1) The device of claim 1, wherein at least one of the steps has a first surface that is substantially parallel to the surface of the III-N material structure and a second surface that is substantially perpendicular to the surface of the III-N material structure. ### Claim 33 (depends on 1) The device of claim 1, wherein the extending portion directly contacts the sidewall. ### Claim 34 A III-N semiconductor device, comprising: an electrode-defining layer having a thickness on a surface of a III-N material structure, the electrode-defining layer having a recess with a sidewall, the sidewall comprising a plurality of steps, wherein a portion of the recess distal from the III-N material structure has a first width, and a portion of the recess proximal to the III-N material structure has a second width, the first width being larger than the second width; and an electrode in the recess, the electrode including an extending portion over the sidewall, a portion of the electrode-defining layer being between the extending portion and the III-N material structure; wherein at least one of the steps in the sidewall has a first surface that is substantially parallel to the surface of the III-N material structure and a second surface that is slanted, the second surface forming an angle of between 5 and 85 degrees with the surface of the III-N material structure. ### Claim 35 (depends on 34) The device of claim 34, wherein the III-N material structure comprises a first III-N material layer and a second III-N material layer, wherein a 2DEG channel is induced in the first III-N material layer adjacent to the second III-N material layer as a result of a compositional difference between the first III-N material layer and the second III-N material layer. ### Claim 36 (depends on 35) The device of claim 35, wherein the first III-N material layer includes GaN. ### Claim 37 (depends on 36) The device of claim 36, wherein the second III-N material layer includes AlGaN or AlInGaN. ### Claim 38 (depends on 35) The device of claim 35, wherein the first III-N material layer and the second III-N material layer are N-face or [0 0 0 1bar] oriented or nitrogen-terminated semipolar layers, and the first III-N material layer is between the second III-N material layer and the electrode-defining layer. ### Claim 39 (depends on 35) The device of claim 35, wherein the recess extends through the entire thickness of the electrode-defining layer. ### Claim 40 (depends on 39) The device of claim 39, wherein the recess extends into the III-N material structure. ### Claim 41 (depends on 34) The device of claim 34, wherein the recess extends partially through the thickness of the electrode-defining layer. ### Claim 42 (depends on 34) The device of claim 34, further comprising a dielectric passivation layer between the III-N material structure and the electrode-defining layer, the dielectric passivation layer directly contacting a surface of the III-N material adjacent to the electrode. ### Claim 43 (depends on 42) The device of claim 42, wherein the dielectric passivation layer is between the electrode and the III-N material structure, such that the electrode does not directly contact the III-N material structure. ### Claim 44 (depends on 43) The device of claim 43, further comprising an additional insulating layer between the dielectric passivation layer and the electrode-defining layer. ### Claim 45 (depends on 44) The device of claim 44, wherein the additional insulating layer comprises AlN.