# US 2014/0197416 A1 · Memories and methods of forming thin-film transistors using hydrogen plasma doping

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- Number: US 2014/0197416 A1
- Document ID: US20140197416A1
- Status: Published application
- Kind: A1
- Application number: 13/739,679
- Filed: 2013-01-11
- Published: 2014-07-17
- Earliest claimed: 2013-01-11
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Shu Qin; Haitao Liu; Zhenyu Lu
- Web page: https://patentgrep.com/patent/US20140197416A1

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H01J 37/32412: {Plasma immersion ion implantation}
- H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 41/35: with a cell select transistor, e.g. NAND
- H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 43/35: with cell select transistors, e.g. NAND
- H10D 30/0314: {of lateral top-gate TFTs comprising only a single gate}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 62/40: Crystalline structures
- H10D 62/83: being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10P 14/3438: {Doping during depositing}
- H10P 14/3456: {Polycrystalline}
- H10P 14/418: {the conductive layers comprising transition metals}
- H10P 14/44: Physical vapour deposition [PVD]
- H10P 32/1204: {from a plasma phase}
- H10P 95/90: Thermal treatments, e.g. annealing or sintering
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H)
- H10B: ELECTRONIC MEMORY DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Methods of forming thin-film transistors and memories are disclosed. In one such method, polycrystalline silicon is hydrogen plasma doped to form doped polycrystalline silicon. The doped polycrystalline silicon is then annealed. The hydrogen plasma doping and the annealing are decoupled.

## Claims

### Claim 1

A method of forming thin-film transistors, comprising:
hydrogen plasma doping polycrystalline silicon to form doped polycrystalline silicon; and
annealing the doped polycrystalline silicon, wherein the hydrogen plasma doping and the annealing are decoupled.

### Claim 2 (depends on 1)

The method of claim 1, wherein the hydrogen plasma doping of the polycrystalline silicon comprises doping a pillar of a channel for a NAND string.

### Claim 3 (depends on 1)

The method of claim 1 further comprising:
forming a stack of alternating layers of a semiconductor material and a dielectric material in a vertical tier;
forming an opening in the stack of alternating layers;
forming a tunnel dielectric along the opening; and
forming the polycrystalline silicon in the opening, wherein the polycrystalline silicon forms a pillar of a channel for a NAND string.

### Claim 4 (depends on 3)

The method of claim 3 further comprising:
recessing the semiconductor material from the opening, and
forming a blocking dielectric in recesses formed by recessing the semiconductor material from the opening.

### Claim 5 (depends on 1)

The method of claim 1 further comprising:
in-situ depositing a deposition material; and
removing the deposition material after annealing the doped polycrystalline silicon.

### Claim 6 (depends on 5)

The method of claim 5, wherein in-situ depositing the deposition material comprises in-situ depositing an element selected from a group consisting of boron (B), Argon (Ar) and Phosphorus (P).

### Claim 7 (depends on 1)

The method of claim 1 further comprising:
depositing a metal; and
removing the metal after annealing the doped polycrystalline silicon.

### Claim 8 (depends on 7)

The method of claim 7, wherein depositing a metal comprises depositing a metal selected from the group consisting of aluminum (Al), tungsten (W), titanium (Ti) and titanium nitride (TiN).

### Claim 9 (depends on 7)

The method of claim 7, wherein depositing a metal comprises physical vapor depositing (PVD) the metal.

### Claim 10 (depends on 1)

The method of claim 1, wherein hydrogen plasma doping polycrystalline silicon comprises hydrogen plasma doping the polycrystalline silicon using an energy of 1-10 keV and a hydrogen dose of 1×1017-1×1019/cm2.

### Claim 11 (depends on 1)

The method of claim 1, wherein hydrogen plasma doping polycrystalline silicon comprises hydrogen plasma doping the polycrystalline silicon using an energy of 1-10 keV and a hydrogen dose of 5×1018/cm2.

### Claim 12 (depends on 1)

The method of claim 1, wherein annealing the doped polycrystalline silicon comprises annealing using a temperature of approximately 350-400° C.

### Claim 13 (depends on 1)

The method of claim 1, wherein hydrogen plasma doping polycrystalline silicon comprises hydrogen plasma doping the polycrystalline silicon at approximately room temperature.

### Claim 14 (depends on 1)

The method of claim 1, wherein annealing comprises furnace annealing.

### Claim 15 (depends on 14)

The method of claim 14, wherein hydrogen plasma doping polycrystalline silicon comprises hydrogen plasma doping the polycrystalline silicon in a chamber and wherein furnace annealing comprises annealing the doped polycrystalline silicon in a furnace that is separate from the chamber.

### Claim 16

A method for forming a memory cell string, comprising:
forming a stack comprising alternating layers of semiconductor material and dielectric material;
forming an opening in the stack;
recessing the polysilicon layers from the opening;
depositing a blocking dielectric in recesses formed by recessing the poly-silicon layers from the opening;
forming charge storage structures in the recesses;
forming a tunnel dielectric in the recesses along the opening;
forming polycrystalline silicon in the opening over the tunnel dielectric to form a pillar of a channel for a NAND string;
hydrogen plasma doping the polycrystalline silicon to form doped polycrystalline silicon; and
separately annealing the doped polycrystalline silicon, wherein the hydrogen plasma doping and the annealing are decoupled.

### Claim 17 (depends on 16)

The method of claim 16 further comprising:
in-situ depositing a deposition material; and
removing the deposition material after annealing the doped polycrystalline silicon.

### Claim 18 (depends on 17)

The method of claim 17, wherein in-situ depositing the deposition material comprises in-situ depositing an element selected from a group consisting of boron (B), Argon (Ar) and Phosphorus (P).

### Claim 19 (depends on 16)

The method of claim 16 further comprising:
depositing a metal; and
removing the metal after annealing the doped polycrystalline silicon.

### Claim 20 (depends on 19)

The method of claim 19, wherein depositing a metal comprises depositing a metal selected from the group consisting of aluminum (Al), tungsten (W), titanium (Ti) and titanium nitride (TiN).

### Claim 21 (depends on 16)

The method of claim 16, wherein annealing the doped polycrystalline silicon comprises annealing using a temperature of approximately 350-400° C.

### Claim 22 (depends on 16)

The method of claim 16, wherein hydrogen plasma doping polycrystalline silicon comprises hydrogen plasma doping the polycrystalline silicon at approximately room temperature.

### Claim 23 (depends on 16)

The method of claim 16, wherein hydrogen plasma doping polycrystalline silicon comprises hydrogen plasma doping the polycrystalline silicon in a chamber and wherein the separately annealing the doped polycrystalline silicon comprises annealing the doped polycrystalline silicon in a furnace that is separate from the chamber.

### Claim 24

A memory formed according to a method, comprising:
hydrogen plasma doping, for a three-dimensional NAND array, polycrystalline silicon to form doped polycrystalline silicon; and
annealing the three-dimensional NAND array having the doped polycrystalline silicon, wherein the hydrogen plasma doping and the annealing are decoupled.

### Claim 25 (depends on 24)

The memory of claim 24 further comprising performing in-situ deposition after hydrogen plasma doping the polycrystalline silicon, and removing the deposition layer after annealing the three-dimensional NAND array having the doped polycrystalline silicon.

### Claim 26 (depends on 24)

The memory of claim 24 further comprises performing metal deposition to deposit a metal layer after hydrogen plasma doping the polycrystalline silicon, and removing the deposited metal layer after annealing the three-dimensional NAND array having the doped polycrystalline silicon.