# US 2014/0197406 A1 · Transistor and display device

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- Number: US 2014/0197406 A1
- Document ID: US20140197406A1
- Status: Published application
- Kind: A1
- Application number: 14/217,887
- Filed: 2014-03-18
- Published: 2014-07-17
- Earliest claimed: 2009-09-04
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Shunpei YAMAZAKI; Toshinari SASAKI; Junichiro SAKATA; Masashi TSUBUKU
- Web page: https://patentgrep.com/patent/US20140197406A1

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device}
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6756: {Amorphous oxide semiconductors}
- H10D 62/80: characterised by the materials
- H10D 64/512: {Disposition of the gate electrodes, e.g. buried gates}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10D 30/6737: {characterised by the electrode materials}
- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/6743: {Silicon}
- H10D 86/40: characterised by multiple TFTs
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/1216: {the pixel elements being capacitors}
- H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT]
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.

## Claims

### Claim 1

(canceled)

### Claim 2

A semiconductor device comprising:
a gate electrode;
a gate insulating layer over the gate electrode;
an oxide semiconductor layer over the gate insulating layer;
an oxide insulating layer over the oxide semiconductor layer;
a source electrode layer over the oxide semiconductor layer and the oxide insulating layer;
a drain electrode layer over the oxide semiconductor layer and the oxide insulating layer; and
an insulating layer over the oxide insulating layer and the oxide semiconductor layer,
wherein the oxide insulating layer is in contact with an edge portion of the oxide semiconductor layer, and
wherein the edge portion is in an oxygen-excess state.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2,
wherein the oxide semiconductor layer comprises a channel formation region, and
wherein the channel formation region is in an oxygen-excess state.

### Claim 4 (depends on 2)

The semiconductor device according to claims 2,
wherein the insulating layer is over the source electrode layer and the drain electrode layer.

### Claim 5 (depends on 2)

The semiconductor device according to claim 2,
wherein the insulating layer is in contact with the oxide semiconductor layer.

### Claim 6 (depends on 2)

The semiconductor device according to claim 2,
wherein a peak of a desorption constituent, which is derived from moisture, is not shown in a spectrum of the oxide semiconductor layer, which is shown with thermal desorption spectroscopy in a temperature range of greater than or equal to 200° C. and less than or equal to 350° C.

### Claim 7 (depends on 2)

The semiconductor device according to claim 2,
wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

### Claim 8 (depends on 2)

The semiconductor device according to claim 2,
wherein the oxide insulating layer comprises silicon.

### Claim 9 (depends on 2)

The semiconductor device according to claim 2,
wherein the source electrode layer and the drain electrode layer comprise at least one of titanium, molybdenum, tungsten, aluminum, chromium, copper, and tantalum.

### Claim 10 (depends on 2)

The semiconductor device according to claim 2,
wherein the insulating layer comprises at least one of silicon oxide, silicon oxynitride, aluminum oxide, and aluminum oxynitride.

### Claim 11 (depends on 2)

The semiconductor device according to claim 2, further comprising an oxide conductive layer over the oxide semiconductor layer.

### Claim 12 (depends on 2)

A display device comprising the semiconductor device according to claim 2.

### Claim 13 (depends on 2)

An electronic device comprising the semiconductor device according to claim 2.