# US 2014/0197037 A1 · Treatment method of electrodeposited copper for wafer-level-packaging process flow

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- Number: US 2014/0197037 A1
- Document ID: US20140197037A1
- Status: Published application
- Kind: A1
- Application number: 13/744,335
- Filed: 2013-01-17
- Published: 2014-07-17
- Earliest claimed: 2013-01-17
- Assignees: Novellus Systems, Inc.
- Inventors: Bryan L. Buckalew; Steven T. Mayer; Thomas Ponnuswamy; David Porter
- Web page: https://patentgrep.com/patent/US20140197037A1

## CPC

- C25D 3/38: of copper
- C25D 5/10: Electroplating with more than one layer of the same or of different metals (for bearings C25D7/10)
- C25D 5/50: by heat-treatment
- C25D 5/611: {Smooth layers}
- H10P 72/0476: {comprising at least one plating chamber}
- C25D 3/60: containing more than 50% by weight of tin
- C25D 17/00: Constructional parts, or assemblies thereof, of cells for electrolytic coating
- H10P 14/47: Electrolytic deposition, i.e. electroplating; Electroless plating
- H10W 72/01225: {in solid form, e.g. by using a powder or by stud bumping}
- H10W 72/01257: {by reflowing}
- H10W 72/019: {of bond pads}
- H10W 72/01935: {by plating, e.g. electroless plating or electroplating}
- H10W 72/0198: {batch processes}
- H10W 72/07255: {changes in materials}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/2528: {Intermetallic compounds}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/922: {Bond pads being integral with underlying chip-level interconnections}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 95/00: Packaging processes not covered by the other groups of this subclass
- C25D: PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of treating a copper containing structure on a substrate is disclosed. The method includes electrodepositing the copper containing structure on a substrate, annealing the copper containing structure, and forming an interface between a pad of the copper containing structure and a solder structure after anneal. The interface can have improved resistance to interfacial voiding. The copper containing structure is configured to deliver current between one or more ports and one or more solder structures in the integrated circuit package. Annealing the copper containing structure can move impurities and vacancies to the surface of the copper containing structure for subsequent removal.

## Claims

### Claim 1

A method of treating a copper containing structure in an integrated circuit package, comprising:
electrodepositing the copper containing structure on a substrate, wherein the copper containing structure is configured to deliver current between one or more ports and one or more solder structures in the integrated circuit package;
annealing the copper containing structure; and
after annealing the copper containing structure, forming an interface between a pad on the copper containing structure and one of the solder structures, wherein the interface between the pad and the solder structure has improved resistance to interfacial voiding at the interface.

### Claim 2 (depends on 1)

The method of claim 1, further comprising mechanically contacting the solder structure on the pad after annealing the copper containing structure.

### Claim 3 (depends on 1)

The method of claim 1, further comprising electrodepositing the solder structure on the pad after annealing the copper containing structure.

### Claim 4 (depends on 3)

The method of claim 3, wherein electrodepositing the copper containing structure and electrodepositing the solder structure occur in the same electrodepositing tool.

### Claim 5 (depends on 1)

The method of claim 1, wherein the copper containing structure comprises only copper or copper alloy.

### Claim 6 (depends on 1)

The method of claim 1, wherein copper containing structure is part of a redistribution layer in the integrated circuit package.

### Claim 7 (depends on 1)

The method of claim 1, wherein electrodepositing the copper containing structure comprises using an electroplating solution containing additives.

### Claim 8 (depends on 7)

The method of claim 7, wherein the additives comprise at least one of an accelerator, suppressor, or leveler.

### Claim 9 (depends on 1)

The method of claim 1, wherein the copper containing structure has a thickness greater than about 1

### Claim 10 (depends on 1)

The method of claim 1, wherein the one or more solder structures comprises tin.

### Claim 11 (depends on 10)

The method of claim 10, wherein the interface comprises an intermetallic compound, the intermetallic compound comprising copper and tin.

### Claim 12 (depends on 1)

The method of claim 1, wherein electrodepositing the copper containing structure is performed at a rate that is at least 25% of the limiting current for electrodepositing copper.

### Claim 13 (depends on 12)

The method of claim 12, wherein the rate of electrodepositing the copper containing structure is greater than about 1 μm per minute in a direction away from the substrate.

### Claim 14 (depends on 1)

The method of claim 1, wherein the pad of the copper containing structure and the solder structure is substantially free of any nickel, cobalt, and gold.

### Claim 15 (depends on 1)

The method of claim 1, wherein annealing the copper containing structure comprises annealing at a temperature between about 100° C. and about 400° C.

### Claim 16 (depends on 15)

The method of claim 15, wherein annealing the copper containing structure comprises annealing at a temperature between about 100° C. and about 250° C.

### Claim 17 (depends on 1)

The method claim 1, wherein annealing the copper containing structure is performed in a reducing gas atmosphere.

### Claim 18 (depends on 1)

The method of claim 1, further comprising removing a photoresist from the substrate used for patterning the copper containing structure before annealing the copper containing structure,

### Claim 19 (depends on 1)

The method of claim 1, further comprising removing a photoresist from the substrate used for patterning the copper containing structure after annealing the copper containing structure.

### Claim 20

An apparatus for treating a copper containing structure in an integrated circuit package, comprising
an electroplating cell;
an annealing station; and
a controller with instructions for performing the following operations:
(a) in the electroplating cell, electrodepositing the copper containing structure on a substrate, wherein the copper containing structure is configured to deliver current between one or more ports and one or more solder structures in the integrated circuit package;
(b) in the annealing station, annealing the copper containing structure; and
(c) after annealing the copper containing structure, forming an interface between a pad on the copper containing structure and one of the solder structures, wherein the interface between the pad and the solder structure has improved resistance to interfacial voiding at the interface.

### Claim 21 (depends on 20)

The apparatus of claim 20, wherein the instructions for electrodepositing the copper containing structure comprise instructions for electrodepositing the copper containing structure at a rate that is at least 25% of the limiting current for electrodepositing copper.

### Claim 22 (depends on 20)

The apparatus of claim 20, wherein the instructions for annealing the copper containing structure comprise instructions for annealing the copper containing structure at a temperature between about 100° C. and about 250° C.

### Claim 23 (depends on 20)

The apparatus of claim 20, wherein the instructions for electrodepositing the copper containing structure comprise instructions for forming the copper containing structure comprising only copper or copper alloy.

### Claim 24 (depends on 20)

The apparatus of claim 20, wherein the controller further comprises instructions for mechanically contacting the solder structure on the pad after annealing the copper containing structure.

### Claim 25 (depends on 20)

The apparatus of claim 20, wherein the controller further comprises instructions fir electrodepositing the solder structure on the pad after annealing the copper containing structure.

### Claim 26 (depends on 20)

The apparatus of claim 20, wherein the controller further comprises instructions for removing photoresist from the substrate used for patterning the copper containing structure after annealing the copper containing structure.

### Claim 27 (depends on 20)

The apparatus of claim 20, wherein the controller further comprises instructions for removing photoresist from the substrate used for patterning the copper containing structure before annealing the copper containing structure.

### Claim 28 (depends on 20)

The apparatus of claim 20, wherein the instructions for electrodepositing the copper containing structure comprise instructions for using an electroplating solution containing additives.

### Claim 29 (depends on 28)

The apparatus of claim 28, wherein the additives comprise at least one of an accelerator, suppressor, or leveler.

### Claim 30 (depends on 20)

The apparatus of claim 20, wherein the instructions for electrodepositing the copper containing structure comprise instructions for electrodepositing the copper containing structure at a rate that is greater than about 1 μm per minute in a direction away from the substrate.

### Claim 31 (depends on 20)

The apparatus of claim 20, wherein the instructions for annealing the copper containing structure comprise instructions for annealing the copper containing structure in a reducing gas atmosphere.
