# US 2014/0196937 A1 · Multi-layered capacitor and circuit board mounted with multi-layered capacitor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0196937 A1 - Document ID: US20140196937A1 - Status: Published application - Kind: A1 - Application number: 14/075,544 - Filed: 2013-11-08 - Published: 2014-07-17 - Earliest claimed: 2013-01-15 - Assignees: Samsung Electro-Mechanics Co., Ltd. - Applicants: Samsung Electro-Mechanics Co., Ltd. - Inventors: Min Cheol PARK; Young Ghyu AHN; Sang Soo PARK; Joon Yeob CHO - Web page: https://patentgrep.com/patent/US20140196937A1 ## CPC - H01G 4/1227: {based on alkaline earth titanates} - H01G 4/1236: {based on zirconium oxides or zirconates (H01G4/1263 takes precedence)} - H01G 4/30: Stacked capacitors (H01G4/33 takes precedence) - H01G 4/385: {Single unit multiple capacitors, e.g. dual capacitor in one coil} - H05K 3/3442: {having edge contacts, e.g. leadless chip capacitors, chip carriers} - H05K 3/346: Solder materials or compositions specially adapted therefor - H05K 2201/10015: Non-printed capacitor - H05K 2201/2045: Protection against vibrations - Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product - H01G: CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE (selection of specified materials as dielectric H01B3/00; capacitors having potential barriers H10D1/62, H10K10/10) - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS ## Abstract Disclosed herein is a multi-layered capacitor, including: an element formed by alternately multi-layering a dielectric layer and an internal electrode; and external terminals disposed at both ends of the element, wherein the dielectric layer disposed at an upper end U and a lower end L of the element is formed of a paraelectric material and the dielectric layer disposed at a central part C of the element is formed of a ferroelectric material. ## Claims ### Claim 1 A multi-layered capacitor, comprising: an element formed by alternately multi-layering a dielectric layer and an internal electrode; and external terminals disposed at both ends of the element, wherein the dielectric layer disposed at an upper end U and a lower end L of the element is formed of a paraelectric material and the dielectric layer disposed at a central part C of the element is formed of a ferroelectric material. ### Claim 2 (depends on 1) The multi-layered capacitor according to claim 1, wherein the ferroelectric material includes any one selected from a group consisting of barium titanate (BaTiO3)-based ceramics, Pb-based composite perovskite-based ceramics, strontium titanate (SrTiO3)-based ceramics or a mixture of two or more thereof. ### Claim 3 (depends on 1) The multi-layered capacitor according to claim 1, wherein the paraelectric material includes any one selected from a group consisting of potassium zirconate (CaZrO3)-based ceramics, barium zirconate (BaZrO3)-based ceramics, and strontium zirconate (SrZrO3)-based ceramic or a mixture of two or more thereof. ### Claim 4 (depends on 1) The multi-layered capacitor according to claim 1, wherein the relationship among a thickness TUPPER of the upper end U, a thickness TLOWER of the lower end L, and a thickness TCENTER of the central part C of the element satisfies the following Equation. (TUPPERTLOWER):TCENTER=1:1 to 1:1.5. ### Claim 5 (depends on 1) The multi-layered capacitor according to claim 1, wherein the upper end U of the element includes a margin layer M11 formed of only the paraelectric material. ### Claim 6 (depends on 1) The multi-layered capacitor according to claim 1, wherein the lower end L of the element includes a margin layer M12 formed of only the paraelectric material. ### Claim 7 (depends on 1) The multi-layered capacitor according to claim 1, wherein the upper end U of the element includes a margin layer M11 formed of only the paraelectric material and the lower end L of the element includes a margin layer M12 formed of only the paraelectric material. ### Claim 8 (depends on 5) The multi-layered capacitor according to claim 5, wherein the margin layer M11 or the margin layer M12 is formed by multi-layering the dielectric layer formed of the paraelectric material in plural. ### Claim 9 A circuit board mounted with a multi-layered capacitor, wherein in a circuit board mounting structure of the multi-layered capacitor, the multi-layered capacitor includes an element formed by alternately multi-layering a dielectric layer and an internal electrode; and external terminals disposed at both ends of the element, the dielectric layer disposed at an upper end U and a lower end L of the element is formed of a paraelectric material and the dielectric layer disposed at a central part C of the element is formed of a ferroelectric material, and the external terminal is conductively connected with a land disposed in the circuit board via a conductive material. ### Claim 10 (depends on 9) The circuit board mounted with a multi-layered capacitor according to claim 9, wherein the relationship between a thickness TLOWER of the lower end L of the element and a height HSOLDER of the conductive material satisfies the following Equation. TLOWER:HSOLDER=0.5:1 to 1:1. ### Claim 11 A multi-layered capacitor, comprising: a capacity portion C formed by alternately multi-layering a dielectric layer formed of a ferroelectric material and an internal electrode; margin portions M21 and M22 disposed on upper and lower parts of the capacity portion C and formed of a paraelectric material; and external terminals disposed at both ends of an element configured of the capacity portion C and the margin portions M21 and M22. ### Claim 12 (depends on 11) The multi-layered capacitor according to claim 11, wherein the ferroelectric material includes any one selected from a group consisting of barium titanate (BaTiO3)-based ceramics, Pb-based composite perovskite-based ceramics, strontium titanate (SrTiO3)-based ceramics or a mixture of two or more thereof. ### Claim 13 (depends on 11) The multi-layered capacitor according to claim 11, wherein the paraelectric material includes any one selected from a group consisting of potassium zirconate (CaZrO3)-based ceramics, barium zirconate (BaZrO3)-based ceramics, and strontium zirconate (SrZrO3)-based ceramic or a mixture of two or more thereof. ### Claim 14 (depends on 11) The multi-layered capacitor according to claim 11, wherein the relationship among a thickness TMARGIN21 of the margin portion M21, a thickness TMARGIN22 of the margin portion M22, and a thickness TCAPACITY of the capacity portion C satisfies the following Equation. (TMARGIN21+TMARGIN22):TCAPACITY=1:1 to 1:1.5 ### Claim 15 A circuit board mounted with a multi-layered capacitor, wherein in a circuit board mounting structure of the multi-layered capacitor, the multi-layered capacitor includes a capacity portion C formed by alternately multi-layering a dielectric layer formed of a ferroelectric material and an internal electrode; margin portions M21 and M22 disposed on upper and lower parts of the capacity portion C and formed of a paraelectric material; and external terminals disposed at both ends of an element configured of the capacity portion C and the margin portions M21 and M22, and the external terminal is conductively connected with a land disposed in the circuit board via a conductive material. ### Claim 16 (depends on 15) The circuit board mounted with a multi-layered capacitor according to claim 15, wherein the relationship between a thickness TMARGIN22 of the margin portion M22 and a height HSOLDER of the conductive material satisfies the following Equation. TMARGIN22:HSOLDER=0.5:1 to 1:1. ### Claim 17 (depends on 6) The multi-layered capacitor according to claim 6, wherein the margin layer M11 or the margin layer M12 is formed by multi-layering the dielectric layer formed of the paraelectric material in plural. ### Claim 18 (depends on 7) The multi-layered capacitor according to claim 7, wherein the margin layer M11 or the margin layer M12 is formed by multi-layering the dielectric layer formed of the paraelectric material in plural.