# US 2014/0196936 A1 · Multilayer ceramic capacitor, mounting board therefor, and manufacturing method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0196936 A1 - Document ID: US20140196936A1 - Status: Published application - Kind: A1 - Application number: 13/844,293 - Filed: 2013-03-15 - Published: 2014-07-17 - Earliest claimed: 2013-01-14 - Assignees: Samsung Electro-Mechanics Co., Ltd. - Applicants: Samsung Electro-Mechanics Co., Ltd. - Inventors: Kyung Pyo HONG; Hyun Hee GU; Doo Young KIM; Young Ghyu AHN; Chang Hoon KIM - Web page: https://patentgrep.com/patent/US20140196936A1 ## CPC - H05K 7/1422: {Printed circuit boards receptacles, e.g. stacked structures, electronic circuit modules or box like frames} - H01G 2/065: {for surface mounting, e.g. chip capacitors} - H01G 4/2325: {characterised by the material of the terminals} - H01G 4/30: Stacked capacitors (H01G4/33 takes precedence) - H05K 3/3442: {having edge contacts, e.g. leadless chip capacitors, chip carriers} - H05K 2201/10015: Non-printed capacitor - H05K 2201/2045: Protection against vibrations - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H01G: CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE (selection of specified materials as dielectric H01B3/00; capacitors having potential barriers H10D1/62, H10K10/10) ## Abstract There is provided a multilayer ceramic capacitor including: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes formed on at least one surfaces of the plurality of dielectric layers and alternately exposed to both end surfaces of the ceramic body; first and second external electrodes formed on both end surfaces of the ceramic body and electrically connected to the respective first and second internal electrodes; and first and second non-conductive epoxy resin layers formed on peripheral surfaces of the first and second external electrodes except for mounting surfaces of the first and second external electrodes. ## Claims ### Claim 1 A multilayer ceramic capacitor comprising: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes formed on at least one surfaces of the plurality of dielectric layers and alternately exposed to both end surfaces of the ceramic body; first and second external electrodes formed on both end surfaces of the ceramic body and electrically connected to the respective first and second internal electrodes; and first and second non-conductive epoxy resin layers formed on peripheral surfaces of the first and second external electrodes except for mounting surfaces of the first and second external electrodes. ### Claim 2 (depends on 1) The multilayer ceramic capacitor of claim 1, wherein the first and second non-conductive epoxy resin layers have a height equal to 20% or greater of a height of the ceramic body. ### Claim 3 (depends on 1) The multilayer ceramic capacitor of claim 1, further comprising first and second plating layers formed on surfaces of the first and second external electrodes to be interposed between the first and second external electrodes and the first and second non-conductive epoxy resin layers. ### Claim 4 (depends on 3) The multilayer ceramic capacitor of claim 3, wherein the first and second plating layers include a nickel (Ni) plating layer formed on the surfaces of the first and second external electrodes and a tin (Sn) plating layer formed on a surface of the nickel (Ni) plating layer. ### Claim 5 Amounting board for a multilayer ceramic capacitor, the mounting board comprising: a printed circuit board having first and second electrode pads formed thereon; and a multilayer ceramic capacitor installed on the printed circuit board, wherein the multilayer ceramic capacitor includes: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes formed on at least one surfaces of the plurality of dielectric layers and alternately exposed to both end surfaces of the ceramic body; first and second external electrodes formed on both end surfaces of the ceramic body, electrically connected to the respective first and second internal electrodes, and having lower surfaces connected to the first and second electrode pads by solder; and first and second non-conductive epoxy resin layers formed on peripheral surfaces of the first and second external electrodes except for mounting surfaces of the first and second external electrodes to allow the solder not to be formed thereon. ### Claim 6 (depends on 5) The mounting board of claim 5, wherein the first and second non-conductive epoxy resin layers have a height equal to 20% or greater of a height of the ceramic body. ### Claim 7 (depends on 5) The mounting board of claim 5, wherein the multilayer ceramic capacitor further includes first and second plating layers formed on surfaces of first and second external electrodes to be interposed between the first and second external electrodes and the first and second non-conductive epoxy resin layers. ### Claim 8 (depends on 7) The mounting board of claim 7, wherein the first and second plating layers include a nickel (Ni) plating layer formed on the surfaces of the first and second external electrodes and a tin (Sn) plating layer formed on a surface of the nickel (Ni) plating layer. ### Claim 9 A manufacturing method of a multilayer ceramic capacitor, the manufacturing method comprising: preparing a plurality of ceramic sheets; forming first and second internal electrodes on at least one surfaces of the plurality of ceramic sheets; stacking the plurality of ceramic sheets on which the first and second internal electrodes are formed to form a stack; cutting the stack while allowing one ends of the first and second internal electrodes to be alternately exposed to both end surfaces of the stack, respectively; sintering the cut stack to form a ceramic body having the plurality of first and second internal electrodes; forming first and second external electrodes, using a conductive paste, on both end surfaces of the ceramic body to be electrically connected to exposed portions of first and second internal electrodes, respectively; and applying a non-conductive epoxy resin to peripheral surfaces of the first and second external electrodes except for mounting surfaces of the first and second external electrodes to form first and second non-conductive epoxy resin layers. ### Claim 10 (depends on 9) The manufacturing method of claim 9, wherein the first and second non-conductive epoxy resin layers are formed to have a height equal to 20% or greater of a height of the ceramic body. ### Claim 11 (depends on 9) The manufacturing method of claim 9, further comprising forming first and second plating layers on surfaces of the first and second external electrodes prior to the forming of the first and second non-conductive epoxy resin layers. ### Claim 12 (depends on 11) The manufacturing method of claim 11, wherein, in the forming of the first and second plating layers, a nickel (Ni) plating layer is formed on the surfaces of the first and second external electrodes, and a tin (Sn) plating layer is formed on a surface of the nickel (Ni) plating layer.