# US 2014/0195992 A1 · Determining a Position of Inspection System Output in Design Data Space > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0195992 A1 - Document ID: US20140195992A1 - Status: Published application - Kind: A1 - Application number: 13/830,539 - Filed: 2013-03-14 - Published: 2014-07-10 - Earliest claimed: 2013-01-07 - Assignees: KLA-Tencor Corporation - Inventors: Vijayakumar Ramachandran - Web page: https://patentgrep.com/patent/US20140195992A1 ## CPC - G01N 21/9501: {Semiconductor wafers (manufacturing processes per se of semiconductor devices implementing a measuring step H10P74/20)} - G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q) ## Abstract Systems and methods for determining a position of output of an inspection system in design data space are provided. One method includes merging more than one feature in design data for a wafer into a single feature that has a periphery that encompasses all of the features that are merged. The method also includes storing information for the single feature without the design data for the features that are merged. The information includes a position of the single feature in design data space. The method further includes aligning output of an inspection system for the wafer to the information for the single feature such that positions of the output in the design data space can be determined based on the design data space position of the single feature. ## Claims ### Claim 1 A method for determining a position of output of an inspection system in design data space, comprising: merging more than one feature in design data for a wafer into a single feature that has a periphery that encompasses all of the features that are merged; storing information for the single feature without the design data for the features to that are merged, wherein the information comprises a position of the single feature in design data space; aligning output of an inspection system for the wafer to the information for the single feature; determining a position of a first portion of the output aligned to the single feature in the design data space based on the position of the single feature in the design data space; and determining positions in the design data space of other portions of the output based on the position of the first portion of the output in the design data space, wherein the merging step, the storing step, the aligning step, determining the position of the first portion, and determining the positions of the other portions are performed by one or more computer systems. ### Claim 2 (depends on 1) The method of claim 1, wherein the output that is aligned comprises output in each of multiple swaths of output acquired by the inspection system for the wafer, and wherein determining the position of the first portion comprises determining positions of each of first portions of the output in each of the multiple swaths aligned to the single feature in the design data space based on the position of the single feature in the design data space. ### Claim 3 (depends on 1) The method of claim 1, wherein the single feature comprises a bounding polygon defining the periphery of the single feature, wherein the single feature comprises no additional features within its periphery, and wherein the bounding polygon contains no additional polygons. ### Claim 4 (depends on 1) The method of claim 1, wherein said merging eliminates intellectual property in the design data from the information for the single feature. ### Claim 5 (depends on 1) The method of claim 1, wherein storing the information comprises storing the information in a storage medium in which the design data is not stored. ### Claim 6 (depends on 1) The method of claim 1, wherein the features that are merged have at least one lateral dimension on the wafer that is less than 100 nm, and wherein the inspection system is not capable of resolving features printed on the wafer having a lateral dimension that is less than 200 nm. ### Claim 7 (depends on 1) The method of claim 1, further comprising identifying isolated features in the design data, wherein the information that is stored does not include the design data for the isolated features. ### Claim 8 (depends on 1) The method of claim 1, wherein the features that are merged comprise dense features in the design data. ### Claim 9 (depends on 1) The method of claim 1, wherein the features that are merged comprise features in a random logic area of the design data. ### Claim 10 (depends on 1) The method of claim 1, wherein said merging comprises merging two or more sets of more than one feature in the design data into corresponding single features, wherein said storing comprises storing information for the corresponding single features without the design data for the features that are merged, and wherein the method further comprises selecting the single feature whose information will be used in the aligning step by acquiring output of the inspection system at locations of the corresponding single features on the wafer and selecting one of the corresponding single features that will provide more accurate alignment than others of the corresponding single features. ### Claim 11 (depends on 1) The method of claim 1, further comprising simulating output that will be produced for the single feature by the inspection system based on the information for the single feature, wherein said storing comprises storing the simulated output with the information for the single feature. ### Claim 12 (depends on 11) The method of claim 11, wherein said aligning comprises aligning the output of the inspection system for the wafer to the simulated output for the single feature. ### Claim 13 (depends on 1) The method of claim 1, wherein said merging comprises merging two or more sets of more than one feature in the design data into corresponding single features, and wherein the method further comprises selecting the single feature whose information will be used in the aligning step from the corresponding single features. ### Claim 14 (depends on 1) The method of claim 1, wherein the design data is not used by the inspection system during inspection of the wafer. ### Claim 15 (depends on 1) The method of claim 1, wherein the inspection system is configured as a bright field inspection system. ### Claim 16 (depends on 1) The method of claim 1, wherein the merging step and the storing step are performed with a first of the one or more computer systems, and wherein the aligning step, determining the position of the first portion, and determining the positions of the other portions are performed with a second of the one or more computer systems. ### Claim 17 A method for determining a position of output of an inspection system in design data space, comprising: aligning output of an inspection system for a wafer to information for a single feature, wherein more than one feature in design data for the wafer were merged into the single feature that has a periphery that encompasses all of the features that were merged, and wherein the information comprises a position of the single feature in design data space; determining a position of a first portion of the output aligned to the single feature in the design data space based on the position of the single feature in the design data space; and determining positions in the design data space of other portions of the output based on the position of the first portion of the output in the design data space, wherein aligning the output, determining the position of the first portion, and determining the positions of the other portions are performed using a computer system. ### Claim 18 (depends on 17) The method of claim 17, wherein the computer system is part of an inspection system, and wherein the features were merged by a computer system of an electronic design automation tool. ### Claim 19 A system configured to determine a position of output of an inspection system in design data space, comprising: a computer subsystem configured for: merging more than one feature in design data for a wafer into a single feature that has a periphery that encompasses all of the features that are merged; and storing information for the single feature without the design data for the features that are merged, wherein the information comprises a position of the single feature in design data space; and an inspection subsystem configured for: scanning the wafer to generate output for the wafer; aligning the output for the wafer to the information for the single feature, determining a position of a first portion of the output aligned to the single feature in the design data space based on the position of the single feature in the design data space; and determining positions in the design data space of other portions of the output based on the position of the first portion of the output in the design data space. ### Claim 20 (depends on 19) The system of claim 19, wherein the computer subsystem is part of an electronic design automation tool, and wherein the inspection subsystem is not part of the electronic design automation tool.