# US 2014/0195712 A1 · Processor module, micro-server, and method of using processor module

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2014/0195712 A1
- Document ID: US20140195712A1
- Status: Published application
- Kind: A1
- Application number: 14/148,962
- Filed: 2014-01-07
- Published: 2014-07-10
- Earliest claimed: 2013-01-07
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Ha-uk RYU
- Web page: https://patentgrep.com/patent/US20140195712A1

## CPC

- G06F 13/4022: {using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence)}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A processor module includes at least one storage device, at least one central processing unit (CPU) that uses a preset interface, and a module controller to relay a connection between a common interface bus formed on the based board and an interface used by the CPU.

## Claims

### Claim 1

A processor module that is installable on a base board of a micro-server, the processor module comprising:
at least one storage device;
at least one central processing unit (CPU) that uses a preset interface; and
a module controller to relay a connection between a common interface bus formed on the based board and an interface used by the CPU.

### Claim 2 (depends on 1)

The processor module of claim 1, wherein:
the module controller converts a signal received through the common interface bus so that the signal corresponds to the preset interface and converts a signal received from the CPU so that the signal corresponds to the common interface bus; and
the common interface bus is an interface bus commonly connect a main controller formed on the base board to a plurality of different types of processor modules.

### Claim 3 (depends on 1)

The processor module of claim 1, wherein the module controller comprises:
a common control interface connected to the common interface bus to receive and transmit a signal comprising at least one of a control command and data;
a controller to convert a signal received through the common interface bus so that the signal corresponds to the preset interface and converts a signal received from the CPU so that the signal corresponds to the common interface bus; and
a module interface connected to the CPU and the storage device to receive and transmit a signal corresponding to the preset interface.

### Claim 4 (depends on 1)

The processor module of claim 1, wherein the common interface bus is an interface bus to support at least one of an Inter-Integrated circuit (i2c) interface and a peripheral component interconnect (PCI)-Express interface.

### Claim 5 (depends on 1)

The processor module of claim 1, further comprising:
a DSP and/or a GPU which performs a predefined calculation according to control of the CPU, and provides the CPU with the calculated result.

### Claim 6

A micro-server comprising:
a main controller;
a base board on which the main controller is mounted;
a common interface bus formed on the based board; and
a plurality of different types of processor modules installed on the based board to be connected to the main controller through the common interface bus,
wherein the plurality of processor modules respectively comprise a module controller to relay connections between the common interface bus and an interface used by CPUs mounted in the processor modules.

### Claim 7 (depends on 6)

The micro-server of claim 6, wherein the module controllers convert a signal received through the common interface bus so that the signal corresponds to the interface and convert a signal received from the CPUs so that the signal corresponds to the common interface bus.

### Claim 8 (depends on 6)

The micro-server of claim 6, wherein the common interface bus is an interface bus to support at least one of an i2c interface and a PCI-Express interface.

### Claim 9 (depends on 6)

The micro-server of claim 6, wherein the plurality of processor modules are designed so that slots and forms of connection pins are equal.

### Claim 10 (depends on 6)

The micro-server of claim 6, wherein the main controller receives status information from the plurality of processor modules.

### Claim 11 (depends on 10)

The micro-server of claim 10, wherein the status information comprises at least one of types of the CPUs of the processor modules, the number of CPUs, bootloader information,
wherein the main controller transmits an administration server to the status information.

### Claim 12 (depends on 10)

The micro-server of claim 10, further comprising:
a Switched Mode Power Supply (SMPS) to selectively supply power to elements of the micro-server,
wherein the main controller controls the SMPS to calculate used voltages and power consumptions of the processor modules by using the status information and supply power according to the used voltages and the power consumptions of the processor modules.

### Claim 13 (depends on 6)

The micro-server of claim 6, further comprising:
an Input/Output (I/O) device comprising at least one I/O card which receives and transmits data with an external device; and
a switch device to selectively connect the I/O device to the plurality of processor modules.

### Claim 14 (depends on 13)

The micro-server of claim 13, wherein the switch device comprises PCI-Express switch circuits to selectively adjust connection relations between the plurality of processor modules and the at least one I/O card.

### Claim 15 (depends on 6)

The micro-server of claim 6, wherein the main controller receives a control command from the administration server to control the plurality of processor modules.

### Claim 16 (depends on 15)

The micro-server of claim 15, wherein if a sleep mode command is received from the administration server, the main controller controls to cut off power of the processor modules of the plurality of processor modules which are not used and to reduce clock speeds of CPUs of the processor modules which are used.

### Claim 17 (depends on 6)

The micro-server of claim 6, wherein at least one of the plurality of processor modules further comprises a DSP and/or a GPU which performs a predefined calculation according to the control of the CPU, and provides the CPU with the calculated result.

### Claim 18 (depends on 6)

The micro-server of claim 6, wherein the common interface bus is connected to a storage system including at least one storage device, and relays connections between each of the plurality of processor modules and the storage system.

### Claim 19

A method of using a processor module of a micro-server comprising a based board on which a main controller is mounted, a common interface bus formed on the based board, and the processor module installed on the base board to be connected to the common interface bus, the method comprising:
if a module controller of the processor module receives a first signal through the common interface bus formed on the base board, converting the first signal so that the first signal corresponds to an interface used by a CPU mounted in the processor module and transmitting the converted first signal to the CPU; and
if the CPU outputs a second signal, converting the second signal so that the second signal corresponds to the common interface bus, through the module controller and transmitting the converted second signal from the module controller to the main controller through the common interface bus.

### Claim 20 (depends on 19)

The method of claim 19, wherein the common interface bus is an interface bus which supports at least one of an i2c interface and a PCI-Express interface.

### Claim 21

A non-transitory computer-readable recording medium executing a method of a micro-server comprising a based board on which a main controller is mounted, a common interface bus formed on the based board, and the processor module installed on the base board to be connected to the common interface bus, the method comprising:
if a module controller of the processor module receives a first signal through the common interface bus formed on the base board, converting the first signal so that the first signal corresponds to an interface used by a CPU mounted in the processor module and transmitting the converted first signal to the CPU; and
if the CPU outputs a second signal, converting the second signal so that the second signal corresponds to the common interface bus and transmitting the converted second signal from the module controller to the main controller through the common interface bus.