# US 2014/0195630 A1 · Direct memory access rate limiting in a communication device

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- Number: US 2014/0195630 A1
- Document ID: US20140195630A1
- Status: Published application
- Kind: A1
- Application number: 13/738,789
- Filed: 2013-01-10
- Published: 2014-07-10
- Earliest claimed: 2013-01-10
- Assignees: QUALCOMM Incorporated
- Applicants: Qualcomm Incorporated
- Inventors: Rahul MALIK; Aaditya RAI; Samarjeet BANERJEE; Abhishek RASTOGI
- Web page: https://patentgrep.com/patent/US20140195630A1

## CPC

- H04L 49/9063: {Intermediate storage in different physical parts of a node or terminal}
- G06F 13/28: using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Rate limiting operations can be implemented at an ingress DMA unit to minimize the probability of dropped packets because of differences between the communication rates of the ingress DMA unit and a packet processing engine. The communication rate associated with each of the software ports of a communication device can be determined and an aggregate software port ingress rate can be calculated by summing the communication rate associated with each of the software ports. The transfer rate associated with the ingress DMA unit can be limited so that packets are transmitted from the ingress DMA unit to the packet processing engine at a communication rate that is at least equal to the aggregate software port ingress rate. If each software port comprises a dedicated rate-limited ingress DMA queue, packets from a rate-limited ingress DMA queue can be transmitted at the at least the communication rate of the corresponding software port.

## Claims

### Claim 1

A method comprising:
determining a communication rate associated with each of a plurality of software ports of a communication device for providing packets to a packet processing engine via an ingress direct memory access (DMA) unit of the communication device;
determining an aggregate software port ingress rate of the communication device based on a sum of the communication rate associated with each of the plurality of software ports of the communication device; and
limiting a transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate in providing the packets to the packet processing engine.

### Claim 2 (depends on 1)

The method of claim 1, wherein
the communication device comprises a plurality of hardware ports, and
the plurality of software ports and the plurality of hardware ports share the packet processing engine.

### Claim 3 (depends on 1)

The method of claim 1, wherein the transfer rate associated with the ingress DMA unit comprises one or more of a bits per second throughput associated with the ingress DMA unit and a number of packets transferred per second by the ingress DMA unit.

### Claim 4 (depends on 1)

The method of claim 1, wherein said limiting the transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate comprises configuring the ingress DMA unit to provide packets received from the plurality of software ports to the packet processing engine at a transfer rate that is at least equal to the aggregate software port ingress rate and that is less than a communication rate of the packet processing engine.

### Claim 5 (depends on 1)

The method of claim 1, wherein the communication device comprises one or more processors units configured to pre-process packets received at corresponding ones of the plurality of software ports.

### Claim 6 (depends on 1)

The method of claim 1, wherein the ingress DMA unit comprises a plurality of ingress DMA queues, wherein each of the plurality of ingress DMA queues corresponds to a subset of the plurality of software ports.

### Claim 7 (depends on 1)

The method of claim 1, wherein the ingress DMA unit comprises a plurality of ingress DMA queues, wherein each of the plurality of software ports maps to at least one of the plurality of ingress DMA queues.

### Claim 8 (depends on 1)

The method of claim 1, wherein if the ingress DMA unit comprises one or more ingress DMA queues associated with corresponding plurality of software ports, said limiting the transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate comprises,
for an ingress DMA queue,
providing, from the ingress DMA queue, packets received from the corresponding software port to the packet processing engine at a transfer rate that is at least equal to the communication rate associated with the software port.

### Claim 9 (depends on 1)

The method of claim 1, wherein the aggregate software port ingress rate is less than a communication rate of the packet processing engine.

### Claim 10 (depends on 1)

The method of claim 1, wherein if the ingress DMA unit comprises one or more ingress DMA queues associated with corresponding plurality of software ports, the method further comprises:
for a rate limiter associated with one of the one or more ingress DMA queues,
configuring a communication rate of the rate limiter associated with the ingress DMA queue to be at least equal to a communication rate associated with the software port associated with ingress DMA queue and less than a communication rate of the packet processing engine,
wherein the sum of the aggregate software port ingress rate and an aggregate hardware port ingress rate is less than or equal to a processing rate of the packet processing engine,
wherein the aggregate hardware port ingress rate is a sum of communication rates associated with each of one or more hardware ports associated with the communication device.

### Claim 11 (depends on 10)

The method of claim 10, wherein
the communication rate associated with each of the plurality of software ports is a peak ingress communication rate associated with each of the plurality of software ports; and
the communication rate associated with each of the one or more hardware ports is a peak ingress communication rate associated with each of the one or more hardware ports.

### Claim 12 (depends on 10)

The method of claim 10, wherein the communication rate of the packet processing engine is a design capacity of the packet processing engine, wherein the design capacity of the packet processing engine comprises at least one of a predefined bits per second throughput of the packet processing engine and a predefined packets per second throughput of the packet processing engine.

### Claim 13 (depends on 1)

The method of claim 1, if the ingress DMA unit comprises one or more ingress DMA queues associated with corresponding plurality of software ports, the method further comprises:
determining, at the ingress DMA unit, whether to provide a packet from a first ingress DMA queue to the packet processing engine based on one or more of:
determining whether providing the packet to the packet processing engine will cause the packet processing engine to exceed one or more predetermined communication rate thresholds associated with the first ingress DMA queue;
determining whether the first ingress DMA queue comprises a packet for transfer to the packet processing engine; and
determining whether the ingress DMA unit is currently transmitting another packet to the packet processing engine.

### Claim 14 (depends on 13)

The method of claim 13, wherein said determining whether providing the packet to the packet processing engine will cause the packet processing engine to exceed the one or more predetermined communication rate thresholds associated with the first ingress DMA queue further comprises:
determining whether providing the packet to the packet processing engine will cause the packet processing engine to exceed a predefined bits per second throughput threshold; and
determining whether providing the packet to the packet processing engine will cause the packet processing engine to exceed a predefined packets processed per second threshold.

### Claim 15 (depends on 13)

The method of claim 13, wherein if the communication rate is a throughput, said determining whether providing the packet to the packet processing engine will cause the packet processing engine to exceed the one or more predetermined communication rate thresholds associated with the first ingress DMA queue comprises:
determining a throughput threshold divider value based, at least in part, on a maximum throughput to which the ingress DMA unit should be limited;
determining a current clock count value that represents a number of elapsed clock cycles;
determining that the throughput threshold divider value equals the current clock count value;
incrementing a throughput credit counter value by a predetermined value in response to said determining that the throughput threshold divider value equals the current clock count value;
determining that the throughput credit counter value equals a predefined bits per second throughput threshold; and
generating a notification that indicates that providing the packet to the packet processing engine will not cause the packet processing engine to exceed the predefined bits per second throughput threshold.

### Claim 16 (depends on 15)

The method of claim 15, further comprising:
in response to transmitting a packet from the ingress DMA unit to the packet processing engine, decrementing the throughput credit counter value by the predetermined value for each clock cycle that the packet is transmitted from the ingress DMA unit to the packet processing engine.

### Claim 17 (depends on 1)

The method of claim 1, further comprising receiving a packet in a first packet format at a first of the plurality of software ports;
storing the packet in a software managed memory unit of the communication device, in response to said receiving the packet at the first of the plurality of software ports;
generating an interrupt to a processing unit of the communication device to indicate said storing the packet in the software managed memory unit;
pre-processing, by the processing unit, the packet stored in the software managed memory unit to at least convert the packet from the first packet format into a second packet format recognized by the packet processing engine; and
providing the packet in the second packet format to the ingress DMA unit for subsequent transfer to the packet processing engine.

### Claim 18 (depends on 17)

The method of claim 17, wherein said providing the packet in the second packet format to the ingress DMA unit for subsequent transfer to the packet processing engine comprises:
providing the packet to a first of a plurality of rate-limited ingress DMA queues of the ingress DMA unit, wherein the first of the plurality of rate-limited ingress DMA queues corresponds to the first of the plurality of software ports.

### Claim 19 (depends on 17)

The method of claim 17, wherein the first packet format is one of a wireless local area network (WLAN) packet format or a universal serial bus (USB) packet format.

### Claim 20 (depends on 17)

The method of claim 17, wherein the second packet format is an Ethernet packet format.

### Claim 21 (depends on 1)

The method of claim 1, further comprising:
determining, at the packet processing engine, to transmit a packet from a first of the plurality of software ports of the communication device to a second communication device based on one or more of available software ports, a processing unit associated with the one or more available software ports, and a priority of the packet;
transmitting, from the packet processing engine, the packet to an egress DMA unit of the communication device;
determining, at the egress DMA unit, a processing capacity and a current resource utilization level of an egress DMA queue associated with the first of the plurality of software ports based, at least in part, on a predefined threshold associated with the egress DMA queue; and
transferring the packet from the egress DMA unit based, at least in part, on the processing capacity, the current resource utilization level, and the predefined threshold associated with the egress DMA queue.

### Claim 22 (depends on 21)

The method of claim 21,
wherein the egress DMA unit comprises one or more rate-limited egress DMA queues associated with corresponding ones of the plurality of software ports of the communication device,
wherein said transmitting the packet to the egress DMA unit of the communication device comprises transmitting the packet to a first of the one or more rate-limited egress DMA queues that corresponds to the first of the plurality of software ports, and
wherein each of the one or more rate-limited egress DMA queues is configured to provide packets to a corresponding software port at a communication rate that is less than or equal to the communication rate associated with the software port.

### Claim 23 (depends on 21)

The method of claim 21,
wherein the egress DMA unit comprises one or more rate-limited egress DMA queues associated with corresponding ones of the plurality of software ports of the communication device; and
wherein each of the one or more rate-limited egress DMA queues are configured to receive packets based, at least in part, on priority for transmission from corresponding ones of the plurality of software ports of the communication device.

### Claim 24

A method comprising:
determining an ingress rate associated with each of a plurality of software ports of a communication device for providing packets to a packet processing engine via an ingress direct memory access (DMA) unit of the communication device;
determining an aggregate software port ingress rate of the communication device based on a sum of the ingress rate associated with each of the plurality of software ports of the communication device; and
configuring the ingress DMA unit to provide packets received from the plurality of software ports to the packet processing engine at a transfer rate that is at least equal to the aggregate software port ingress rate and that is less than a communication rate of the packet processing engine.

### Claim 25 (depends on 24)

The method of claim 24, wherein if the ingress DMA unit comprises one or more ingress DMA queues associated with corresponding plurality of software ports, for an ingress DMA queue,
configuring the ingress DMA unit to provide packets received from a corresponding software port to the packet processing engine at a transfer rate that is at least equal to the ingress rate associated with the software port and that is less than the communication rate of the packet processing engine.

### Claim 26 (depends on 24)

The method of claim 24, further comprising:
determining, at the ingress DMA unit, whether to provide a packet received from a first of the plurality of software ports to the packet processing engine based on one or more of:
determining whether providing the packet to the packet processing engine will cause the packet processing engine to exceed one or more predetermined communication rate thresholds associated with the packet processing engine;
determining whether the ingress DMA unit comprises a packet for transfer to the packet processing engine; and
determining whether the ingress DMA unit is currently transferring another packet to the packet processing engine.

### Claim 27

A communication device comprising:
an ingress direct memory access (DMA) unit operable to transfer one or more packets to a packet processing engine of the communication device;
a processor coupled with the ingress DMA unit, the processor operable to:
determine a communication rate associated with each of a plurality of software ports of the communication device for providing packets to the packet processing engine;
determine an aggregate software port ingress rate of the communication device based on a sum of the communication rate associated with each of the plurality of software ports of the communication device; and
limit a transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate in providing the packets to the packet processing engine; and
the packet processing engine coupled with the ingress DMA unit, the packet processing engine operable to process one or more packets received by at least the plurality of software ports, wherein the ingress DMA unit couples the plurality of software ports and the packet processing engine.

### Claim 28 (depends on 27)

The communication device of claim 27, wherein the transfer rate associated with the ingress DMA unit comprises one or more of a bits per second throughput associated with the ingress DMA unit and a number of packets transferred per second by the ingress DMA unit.

### Claim 29 (depends on 27)

The communication device of claim 27, wherein the processor operable to limit the transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate comprises the processor operable to configure the ingress DMA unit to provide packets received from the plurality of software ports to the packet processing engine at a transfer rate that is at least equal to the aggregate software port ingress rate and that is less than a communication rate of the packet processing engine.

### Claim 30 (depends on 27)

The communication device of claim 27, wherein if the ingress DMA unit comprises one or more ingress DMA queues associated with corresponding plurality of software ports, the processor operable to limit the transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate comprises the ingress DMA unit operable to:
for an ingress DMA queue,
provide, from the ingress DMA queue, packets received from a corresponding software port to the packet processing engine at a transfer rate that is at least equal to the communication rate associated with the software port, wherein the aggregate software port ingress rate is less than a communication rate of the packet processing engine.

### Claim 31 (depends on 27)

The communication device of claim 27, wherein if the ingress DMA unit comprises one or more ingress DMA queues associated with corresponding plurality of software ports, the communication device further comprises:
a rate limiter unit associated with a first ingress DMA queue operable to determine whether to provide a packet received from a first software port associated with the first ingress DMA queue to the packet processing engine.

### Claim 32 (depends on 31)

The communication device of claim 31, wherein the rate limiter unit operable to determine whether to provide the packet received from the first software port associated with the first ingress DMA queue to the packet processing engine comprises:
a bits per second throughput check unit operable to determine whether providing the packet to the packet processing engine will cause a predefined bits per second throughput threshold to be violated;
a packets per second throughput check unit operable to determine whether providing the packet to the packet processing engine will cause a predefined packets per second threshold to be violated; and
a decision unit coupled with the bits per second throughput check unit and the packets per second throughput check unit, the decision unit operable to indicate whether to provide the packet received from the first software port to the packet processing engine based on one or more of:
the bits per second throughput check unit determining whether providing the packet to the packet processing engine will cause the predefined bits per second throughput threshold to be violated,
the packets per second throughput check unit determining whether providing the packet to the packet processing engine will cause the predefined packets per second threshold to be violated,
determine whether the first ingress DMA queue comprises a packet for transfer to the packet processing engine; and
determine whether the ingress DMA unit is currently transferring another packet to the packet processing engine.

### Claim 33 (depends on 32)

The communication device of claim 32, wherein the bits per second throughput check unit operable to determine whether providing the packet to the packet processing engine will cause a violation of the predefined bits per second throughput threshold comprises:
a first comparator of the bits per second throughput check unit operable to:
determine a throughput threshold divider value based, at least in part, on a maximum throughput to which the ingress DMA unit should be limited;
determine a current clock count value that represents a number of elapsed clock cycles; and
determine that the throughput threshold divider value equals the current clock count value;
a throughput credit counter coupled with the first comparator, the throughput credit counter operable to:
incrementing a throughput credit counter value by a predetermined value in response to the first comparator determining that the throughput threshold divider value equals the current clock count value; and
a second comparator coupled with the throughput credit counter, the second comparator operable to:
determine that the throughput credit counter value equals the predefined bits per second throughput threshold; and
provide a notification to the decision unit that indicates that providing the packet to the packet processing engine will not cause the predefined bits per second throughput threshold to be violated.

### Claim 34 (depends on 33)

The communication device of claim 33, wherein in response to transmitting a packet from the ingress DMA unit to the packet processing engine,
the throughput credit counter is further operable to decrement the throughput credit counter value by the predetermined value for each clock cycle that the packet is transmitted from the ingress DMA unit to the packet processing engine.

### Claim 35 (depends on 27)

The communication device of claim 27, further comprising
a first software port of the plurality of software ports is operable to:
receive a packet in a first packet format;
store the packet in a software managed memory unit of the communication device, in response to receiving the packet in the first packet format; and
generate an interrupt to the processor of the communication device to indicate storing the packet in the software managed memory unit;
the processor operable to:
pre-process the packet stored in the software managed memory unit to at least convert the packet from the first packet format into a second packet format recognized by the packet processing engine; and
provide the packet in the second packet format to the ingress DMA unit for subsequent transmission to the packet processing engine.

### Claim 36 (depends on 26)

The communication device of claim 26, wherein,
the packet processing engine is further operable to:
determine to transmit a packet from a first of the plurality of software ports to a second communication device based on one or more of available software ports, one or more processors associated with the one or more available software ports, and a priority of the packet;
transmit the packet to an egress DMA unit of the communication device;
the egress DMA unit coupled with the packet processing engine, the egress DMA unit operable to:
determine a processing capacity and a current resource utilization level of an egress DMA queue associated with the first of the plurality of software ports based, at least in part, on a predefined threshold associated with the egress DMA queue; and
transfer the packet from the egress DMA unit based, at least in part, on the processing capacity, the current resource utilization level, and the predefined threshold associated with the egress DMA queue.

### Claim 37

One or more machine-readable storage media having instructions stored therein, which when executed by one or more processors causes the one or more processors to perform operations that comprise:
determining a communication rate associated with each of a plurality of software ports of a communication device for providing packets to a packet processing engine via an ingress direct memory access (DMA) unit of the communication device;
determining an aggregate software port ingress rate of the communication device based on a sum of the communication rate associated with each of the plurality of software ports of the communication device; and
limiting a transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate in providing the packets to the packet processing engine.

### Claim 38 (depends on 37)

The machine-readable storage media of claim 37, wherein said operation of limiting the transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate comprises:
configuring the ingress DMA unit to provide packets received from the plurality of software ports to the packet processing engine at a transfer rate that is at least equal to the aggregate software port ingress rate and that is less than a communication rate of the packet processing engine.

### Claim 39 (depends on 37)

The machine-readable storage media of claim 37, wherein if the ingress DMA unit comprises one or more ingress DMA queues associated with corresponding plurality of software ports, said operation of limiting the transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate comprises, for an ingress DMA queue,
providing, from the ingress DMA queue, packets received from a corresponding software port to the packet processing engine at a transfer rate that is at least equal to the communication rate associated with the software port, wherein the aggregate software port ingress rate is less than a communication rate of the packet processing engine.

### Claim 40 (depends on 37)

The machine-readable storage media of claim 37, wherein if the ingress DMA unit comprises one or more ingress DMA queues associated with corresponding plurality of software ports, the operations further comprise:
determining, at the ingress DMA unit, whether to provide a packet received from a first of the plurality of software ports associated with a first ingress DMA queue to the packet processing engine based on one or more of:
determining whether providing the packet to the packet processing engine will cause the packet processing engine to exceed one or more predetermined communication rate thresholds associated with the first ingress DMA queue;
determining whether the first ingress DMA queue comprises a packet for transmission to the packet processing engine; and
determining whether the ingress DMA unit is currently transmitting another packet to the packet processing engine.

### Claim 41 (depends on 40)

The machine-readable storage media of claim 40, wherein if the communication rate is a throughput, said operation of determining whether providing the packet to the packet processing engine will cause the packet processing engine to exceed the one or more predetermined communication rate thresholds associated with the first ingress DMA queue comprises:
determining a throughput threshold divider value based, at least in part, on a maximum throughput to which the ingress DMA unit should be limited;
determining a current clock count value that represents a number of elapsed clock cycles;
determining that the throughput threshold divider value equals the current clock count value;
incrementing a throughput credit counter value by a predetermined value in response to said operation of determining that the throughput threshold divider value equals the current clock count value;
determining that the throughput credit counter value equals a predefined bits per second throughput threshold;
generating a notification that indicates that providing the packet to the packet processing engine will not cause the packet processing engine to exceed the predefined bits per second throughput threshold; and
in response to transmitting the packet from the ingress DMA unit to the packet processing engine, decrementing the throughput credit counter value by the predetermined value for each clock cycle that the packet is transmitted from the ingress DMA unit to the packet processing engine.

### Claim 42 (depends on 37)

The machine-readable storage media of claim 37, wherein the operations further comprise:
determining, at the packet processing engine, to transmit a packet from a first of the plurality of software ports of the communication device to a second communication device based on one or more of available software ports, a processing unit associated with the one or more available software ports, and a priority of the packet;
transmitting, from the packet processing engine, the packet of a first packet format to an egress DMA unit of the communication device;
determining, at the egress DMA unit, a processing capacity and a current resource utilization level of an egress DMA queue associated with the first of the plurality of software ports based, at least in part, on a predefined threshold associated with the egress DMA queue; and
transferring the packet from the egress DMA unit based, at least in part, on the processing capacity, the current resource utilization level, and the predefined threshold associated with the egress DMA queue.
