# US 2014/0195580 A1 · Floating point round-off amount determination processors, methods, systems, and instructions > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0195580 A1 - Document ID: US20140195580A1 - Status: Published application - Kind: A1 - Application number: 13/977,257 - Filed: 2011-12-30 - Published: 2014-07-10 - Earliest claimed: 2011-12-30 - Assignees: Intel Corporation - Inventors: Cristina S. Anderson; Bret L. Toll; Robert Valentine; Simon Rubanovich; Amit Gradsieien - Web page: https://patentgrep.com/patent/US20140195580A1 ## CPC - G06F 9/3001: {Arithmetic instructions} - G06F 7/483: Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers {(G06F7/4806, G06F7/4824, G06F7/49, G06F7/491, G06F7/544 take precedence)} - G06F 7/49947: {Rounding} - G06F 9/30014: {with variable precision} - G06F 9/30025: {Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion} - G06F 9/30036: {Instructions to perform operations on packed data, e.g. vector, tile or matrix operations} - G06F 9/30038: {using a mask} - G06F 9/30109: {having multiple operands in a single register} - G06F 9/3013: {according to data content, e.g. floating-point registers, address registers} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A method of an aspect includes receiving a floating point round-off amount determination instruction. The instruction indicates a source of one or more floating point data elements, indicates a number of fraction bits after a radix point, and indicates a destination storage location. A result including one or more result floating point data elements is stored in the destination storage location in response to the floating point round-off amount determination instruction. Each of the one or more result floating point data elements includes a difference between a corresponding floating point data element of the source in a corresponding position, and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits. Other methods, apparatus, systems, and instructions are disclosed. ## Claims ### Claim 1 A method comprising: receiving a floating point round-off amount determination instruction, the floating point round-off amount determination instruction indicating a source of one or more floating point data elements, indicating a number of fraction bits after a radix point, and indicating a destination storage location; and storing a result including one or more result floating point data elements in the destination storage location in response to the floating point round-off amount determination instruction, each of the one or more result floating point data elements including a difference between a corresponding floating point data element of the source in a corresponding position and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits. ### Claim 2 (depends on 1) The method of claim 1, further comprising: determining a rounded version of a floating point data element of the source that has been rounded to the indicated number of the fraction bits; and subtracting the rounded version from the floating point data element of the source. ### Claim 3 (depends on 1) The method of claim 1, wherein receiving comprises receiving a floating point round-off amount determination instruction that explicitly specifies the number of the fraction bits. ### Claim 4 (depends on 3) The method of claim 3, wherein receiving comprises receiving a floating point round-off amount determination instruction that has an immediate that includes a plurality of bits to explicitly specify the number of the fraction bits. ### Claim 5 (depends on 1) The method of claim 1, wherein receiving comprises receiving a floating point round-off amount determination instruction that includes a packed data operation mask specifier and a data element broadcast control. ### Claim 6 (depends on 1) The method of claim 1, wherein receiving comprises receiving a floating point round-off amount determination instruction that indicates a packed data operation mask, and wherein storing the result comprises conditionally storing the one or more result floating point data elements, which each include the difference between the corresponding floating point data element of the source and the rounded version of the corresponding floating point data element of the source, according to the packed data operation mask. ### Claim 7 (depends on 1) The method of claim 1, wherein receiving comprises receiving a floating point round-off amount determination instruction that indicates a source of a single floating point data element, and wherein storing comprises storing a result packed data including a plurality of packed result floating point data elements, each of the result floating point data elements including a difference between the single floating point data element of the source and a rounded version of the single floating point data element of the source that has been rounded to the indicated number of fraction bits. ### Claim 8 (depends on 1) The method of claim 1, wherein receiving comprises receiving a floating point round-off amount determination instruction that indicates the source of a plurality of packed floating point data elements, and wherein storing comprises storing the result including a corresponding plurality of packed result floating point data elements. ### Claim 9 (depends on 1) The method of claim 1, wherein receiving comprises receiving a floating point round-off amount determination instruction that indicates a source of a single scalar floating point data element, and wherein storing comprises storing a result including a single corresponding result floating point data element. ### Claim 10 (canceled) ### Claim 11 (depends on 1) The method of claim 1, wherein receiving comprises receiving a floating point round-off amount determination instruction that indicates a source that includes one of: (1) at least eight double precision floating point data elements; and (2) at least sixteen single precision floating point data elements. ### Claim 12 An apparatus comprising: a plurality of registers; and a floating point execution unit coupled with the plurality of the registers, the floating point execution unit operable, in response to a floating point round-off amount determination instruction indicating a source of one or more floating point data elements, indicating a number of fraction bits after a radix point, and indicating a destination, to store a result including one or more result floating point data elements in the destination, each of the one or more result floating point data elements including a difference between a corresponding floating point data element of the source in a corresponding position and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits. ### Claim 13 (depends on 12) The apparatus of claim 12, wherein the floating point round-off amount determination instruction is to explicitly specify the number of the fraction bits. ### Claim 14 (depends on 13) The apparatus of claim 13, wherein the floating point round-off amount determination instruction is to have an immediate including a plurality of bits to explicitly specify the number of the fraction bits. ### Claim 15 (depends on 12) The apparatus of claim 12, further comprising a packed data operation mask register, and wherein the floating point round-off amount determination instruction is to indicate the packed data operation mask register. ### Claim 16 (depends on 12) The apparatus of claim 12, wherein the floating point round-off amount determination instruction is to indicate a source of a single floating point data element, and wherein the execution unit, in response to the instruction, is to broadcast the single floating point data element. ### Claim 17 (depends on 12) The apparatus of claim 12, further comprising a packed data operation mask register, and wherein the floating point round-off amount determination instruction is to include a packed data operation mask specifier and a data element broadcast control. ### Claim 18 (depends on 12) The apparatus of claim 12, wherein the execution unit, in response to the instruction, is to store a packed data result including a plurality of packed result floating point data elements. ### Claim 19 (depends on 12) The apparatus of claim 12, wherein the packed data result comprises one of at least eight double precision floating point data elements and at least sixteen single precision floating point data elements. ### Claim 20 (depends on 12) The apparatus of claim 12, wherein the execution unit, in response to the instruction, is to store a result including a single scalar floating point data element. ### Claim 21 (depends on 12) The apparatus of claim 12, wherein the execution unit comprises a floating point multiply and add unit. ### Claim 22 (canceled) ### Claim 23 A system comprising: an interconnect; a processor coupled with the interconnect, the processor operable, in response to a floating point round-off amount determination instruction indicating a source of one or more floating point data elements, indicating a number of fraction bits after a radix point, and indicating a destination, to store a result including one or more result floating point data elements in the destination, each of the one or more result floating point data elements including a difference between a corresponding floating point data element of the source in a corresponding position and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits; and a dynamic random access memory (DRAM) coupled with the interconnect. ### Claim 24 (canceled) ### Claim 25 (depends on 23) The system of claim 23, further comprising a packed data operation mask register, and wherein the floating point round-off amount determination instruction is to include a packed data operation mask specifier to specify the packed data operation mask register. ### Claim 26 An article of manufacture comprising: a machine-readable storage medium including one or more solid data storage materials, the machine-readable storage medium storing a floating point round-off amount determination instruction, the floating point round-off amount determination instruction to indicate a source of one or more floating point data elements, to indicate a number of fraction bits after a radix point, and to indicate a destination storage location, and the floating point round-off amount determination instruction if executed by a machine operable to cause the machine to perform operations comprising: storing a result including one or more result floating point data elements in the destination storage location, each of the one or more result floating point data elements including a difference between a corresponding floating point data element of the source in a corresponding position and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits. ### Claim 27 (depends on 26) The article of manufacture of claim 26, wherein the instruction if executed by the machine is further operable to cause the machine to access a packed data operation mask indicated by the instruction. ### Claim 28 (depends on 26) The article of manufacture of claim 26, wherein the instruction if executed by the machine is further operable to cause the machine to broadcast a single source floating point data element indicated by the instruction.