# US 2014/0195576 A1 · Hardware Random Number Generator > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0195576 A1 - Document ID: US20140195576A1 - Status: Published application - Kind: A1 - Application number: 13/738,899 - Filed: 2013-01-10 - Published: 2014-07-10 - Earliest claimed: 2013-01-10 - Assignees: Advanced Micro Devices, Inc. - Applicants: Advanced Micro Devices, Inc. - Inventors: David A. Kaplan; Winthrop J. Wu - Web page: https://patentgrep.com/patent/US20140195576A1 ## CPC - G06F 7/588: {Random number generators, i.e. based on natural stochastic processes} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A random number generator may include an input configured to receive a plurality of entropy bits generated by an entropy source of a random number generator, wherein the random number generator is configured to generate a plurality of random numbers; and an entropy health monitor coupled with the input, wherein the entropy health monitor is configured to perform a corrective action based on the plurality of entropy bits. ## Claims ### Claim 1 An apparatus, comprising: an input configured to receive a plurality of entropy bits generated by an entropy source of a random number generator, wherein the random number generator is configured to generate a plurality of random numbers; and an entropy health monitor coupled with the input, wherein the entropy health monitor is configured to perform a corrective action based on the plurality of entropy bits. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the entropy health monitor comprises a counter coupled with the input, wherein the counter is configured to determine a number of bits having a predetermined logic state within a subset of the plurality of entropy bits, and wherein the entropy health monitor is further configured to perform the corrective action by asserting an error signal in response to the number of bits having the predetermined logic state exceeding at least one threshold. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the subset of the plurality of entropy bits includes bits generated during a predetermined time interval. ### Claim 4 (depends on 2) The apparatus of claim 2, wherein the subset of the plurality of entropy bits includes a predetermined number of the most recently generated entropy bits. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the corrective action comprises generating an interrupt signal. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein the corrective action comprises inhibiting the output of at least one of the plurality of random numbers by the random number generator. ### Claim 7 (depends on 6) The apparatus of claim 6, wherein the entropy health monitor is configured to inhibit the output of random numbers by causing the random number generator to stop generating random numbers. ### Claim 8 (depends on 6) The apparatus of claim 6, wherein the entropy health monitor is configured to inhibit the output of random numbers by causing the random number generator to output a deterministically generated value in response to a request for a random number. ### Claim 9 A hardware random number generator, comprising: an entropy source configured to generate a plurality of entropy bits; an entropy accumulator coupled with the entropy source, wherein the entropy accumulator is configured to update a seed value based on the plurality of entropy bits; a deterministic random bit generator coupled with the entropy accumulator, wherein the deterministic random bit generator is configured to generate one or more final random numbers based on the updated seed value; and an entropy health monitor coupled with the entropy source, wherein the entropy health monitor is configured to perform a corrective action based on the entropy bits. ### Claim 10 (depends on 9) The hardware random number generator of claim 9, wherein the entropy health monitor comprises a counter coupled with the input, wherein the counter is configured to determine a number of bits having a predetermined logic state within a subset of the plurality of entropy bits, and wherein the entropy health monitor is further configured to assert an error signal when the number of bits having the predetermined logic state exceeds at least one threshold. ### Claim 11 (depends on 10) The hardware random number generator of claim 10, wherein the subset of the plurality of entropy bits includes a predetermined number of the most recently generated entropy bits. ### Claim 12 (depends on 9) The hardware random number generator of claim 9, wherein the entropy health monitor is configured to perform the corrective action by causing the random number generator to stop generating random numbers. ### Claim 13 (depends on 9) The hardware random number generator of claim 9, wherein the entropy health monitor is configured to perform the corrective action by causing the random number generator to output a fixed number in response to a request for a random number. ### Claim 14 (depends on 9) The hardware random number generator of claim 9, further comprising: a simulated entropy source configured to generate a plurality of simulated entropy bits; and comparison logic coupled with the deterministic random bit generator, wherein the comparison logic is configured to compare an expected value corresponding to the plurality of simulated entropy bits with a resulting test random value, wherein the deterministic random bit generator is configured to generate the test random value based on the plurality of simulated entropy bits. ### Claim 15 (depends on 9) The hardware random number generator of claim 9, wherein for each entropy bit, the entropy accumulator is configured to perform an XOR operation on the entropy bit and one of the bits in the seed value stored in the entropy accumulator, and wherein the entropy accumulator comprises a plurality of flip-flops each configured to store a bit of the seed value, and wherein at least one of the plurality of flip-flops is further configured to transfer the bit stored in the at least one of the plurality of flip-flops to another of the plurality of flip-flops. ### Claim 16 A method of generating a random number, comprising: receiving from an entropy source a plurality of entropy bits; generating a plurality of final random numbers based on the plurality of entropy bits; and inhibiting output of at least one of the plurality of final random numbers based on the plurality of entropy bits. ### Claim 17 (depends on 16) The method of claim 16, further comprising performing the inhibiting based on whether a number of bits having a predetermined logic state within a subset of the plurality of entropy bits exceeds at least one threshold. ### Claim 18 (depends on 16) The method of claim 16, further comprising identifying a predetermined number of most recently generated entropy bits as the subset of the plurality of entropy bits. ### Claim 19 (depends on 16) The method of claim 16, wherein inhibiting the output of the at least one of the plurality of final random numbers further comprises outputting a deterministically generated value in response to a request for a random number. ### Claim 20 (depends on 16) The method of claim 16, further comprising: storing in a buffer the plurality of final random numbers and, in response to receiving a request for a random number; and when the buffer is storing at least one of the plurality of final random numbers, outputting the one of the plurality of final random numbers, and when the buffer is empty, outputting a new random number of the plurality of final random numbers after the new random number is stored in the buffer.