# US 2014/0195225 A1 · Dac device and audio system

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2014/0195225 A1
- Document ID: US20140195225A1
- Status: Published application
- Kind: A1
- Application number: 14/209,196
- Filed: 2014-03-13
- Published: 2014-07-10
- Earliest claimed: 2011-09-20
- Assignees: Panasonic Corporation
- Applicants: Panasonic Corporation
- Inventors: Toshihiro TORII; Yoshihiro HORII; Masashi UCHIDA; Junji NAKATSUKA; Takaaki SATO
- Web page: https://patentgrep.com/patent/US20140195225A1

## CPC

- G10L 19/00: Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis (in musical instruments G10H)
- H03M 1/66: Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence)
- H03M 3/388: {by storing corrected or correction values in one or more digital look-up tables}
- H03L 7/0891: {the up-down pulses controlling source and sink current generators, e.g. a charge pump}
- H03M 1/00: Analogue/digital conversion; Digital/analogue conversion (conversion of analogue values to or from differential modulation H03M3/00)
- H03M 1/12: Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence)
- H03M 1/747: {with equal currents which are switched by unary decoded digital signals}
- H03M 1/785: {using resistors, i.e. R-2R ladders}
- H03M 3/50: {Digital/analogue converters using delta-sigma modulation as an intermediate step (digital delta-sigma modulators per se H03M7/3004)}
- G10L: SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B)

## Abstract

In a DAC device, a distortion correction function g1(x) of a harmonic obtained from a result of a frequency analysis on an analog output signal of a DAC circuit is obtained. A correction value is determined based on the correction function g1(x) in accordance with an input digital signal, and is previously stored in a memory. A nonlinear correction circuit reads a corresponding correction value from the memory in accordance with the value of a digital signal output from a digital filter, and transmits the correction value to a subtractor. The subtractor subtracts the correction value from the digital signal output from the digital filter.

## Claims

### Claim 1

A DAC device comprising:
a subtraction section configured to subtract a correction value from an input digital signal;
a DAC circuit configured to receive the digital signal from which the correction value has been subtracted by the subtraction section, and to convert the digital signal to an analog signal; and
a correction value output section, wherein
when the input digital signal is output to the DAC circuit without passing through the subtraction section, the correction value output section outputs a distortion component included in an analog signal output from the DAC circuit in accordance with the input digital signal, as a correction value to the subtraction section by using a distortion correction function in accordance with the input digital signal obtained based on information on an analog element in the DAC circuit.

### Claim 2 (depends on 1)

The DAC device of claim 1, wherein
the analog element in the DAC circuit is at least one selected from the group consisting of a resistance of wiring connecting the DAC circuit to a predetermined power supply, a resistance of wiring connecting the DAC circuit to a GND power supply, a resistance of an internal switch, and an output resistance.

### Claim 3 (depends on 1)

The DAC device of claim 1, wherein
the correction value output section includes:
a memory section configured to store a correlation between each of input sections obtained by dividing an entire input section corresponding to an input voltage range of the input digital signal of the DAC device in the distortion correction function, and a correction value based on the distortion correction function that is previously determined for the corresponding one of the input sections; and
a nonlinear correction circuit configured to receive the input digital signal, read a correction value corresponding to the received digital signal from the memory section, and output the correction value to the subtraction section.

### Claim 4 (depends on 3)

The DAC device of claim 3, wherein
the memory section stores a plurality of distortion correction functions in accordance with a voltage range of a digital signal to be input.

### Claim 5 (depends on 3)

The DAC device of claim 3, wherein
the memory section includes a look-up table that stores a correlation between each of the input sections and a corresponding correction value.

### Claim 6 (depends on 3)

The DAC device of claim 3, wherein
the entire input section of the distortion correction function in the memory section is evenly divided into the plurality of input sections.

### Claim 7 (depends on 3)

The DAC device of claim 3, wherein
the entire input section of the distortion correction function in the memory section is divided into the plurality of input sections such that
a width of the input sections decreases as a degree of change in the distortion correction function increases.

### Claim 8 (depends on 6)

The DAC device of claim 6, wherein
the correction value is determined such that a distortion component included in an analog signal output from the DAC circuit is close to zero at a maximum distortion point and a minimum distortion point of the distortion correction function in the memory section.

### Claim 9 (depends on 6)

The DAC device of claim 6, wherein
the correction value is determined such that a distortion component included in an analog signal output from the DAC circuit is close to zero at a maximum distortion point and a minimum distortion point of the distortion correction function in the memory section.

### Claim 10 (depends on 3)

The DAC device of claim 3, wherein
the entire input section of the distortion correction function in the memory section is divided into the plurality of input sections such that an amount of change in distortion of the distortion correction function is uniform among the plurality of input sections.

### Claim 11 (depends on 10)

The DAC device of claim 10, wherein
the correction value is determined such that a distortion component included in an analog signal output from the DAC circuit is close to zero at a maximum distortion point and a minimum distortion point of the distortion correction function in the memory section.

### Claim 12 (depends on 10)

The DAC device of claim 10, wherein
the correction value is determined such that a distortion component included in an analog signal output from the DAC circuit is zero at a maximum distortion point and a minimum distortion point of the distortion correction function in the memory section.

### Claim 13 (depends on 1)

The DAC device of claim 1, wherein
the correction value output section is a computing section that receives the input digital signal, and based on the received digital signal and the distortion correction function, obtains a correction value to be output to the subtraction section.

### Claim 14 (depends on 13)

The DAC device of claim 13, wherein
the computing section switches the distortion correction function to be used by the computing section, in accordance with a voltage range of a digital signal to be input.

### Claim 15 (depends on 1)

An audio system comprising:
the DAC device of claim 1;
a loudspeaker; and
a signal processing circuit, wherein
an audio signal converted to an analog signal by the DAC device is output from the loudspeaker through the signal processing circuit, and
when the input digital signal is output to the DAC circuit without passing through the subtraction section, the correction value output section determines a correction value to be output to the subtraction section of the DAC device by using a distortion correction function in accordance with the input digital signal obtained based information on a harmonic component of an input frequency that is a result of a frequency analysis on an analog signal output from the DAC circuit in accordance with the input digital signal and processed by the signal processing circuit.

### Claim 16 (depends on 1)

The DAC device of claim 1, further comprising:
a digital filter configured to multiply a sampling frequency of the input digital signal by n (where n≧2);
a noise shaper configured to receive an output from the digital filter and change frequency characteristics of noise to predetermined characteristics together with word length limitation;
a decoder configured to receive an output from the noise shaper as an input and convert the received output to a 1-bit signal series in accordance with a value of the input;
a 1-bit DAC row configured to convert an output from the decoder to an analog signal; and
an analog adder configured to obtain a sum of outputs from the 1-bit DAC row, wherein
the output from the decoder is determined such that the number of 1-bit signals is cyclic in accordance with a value of the output from the noise shaper.
