# US 2014/0194080 A1 · Method and apparatus for calibrating time alignment

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- Number: US 2014/0194080 A1
- Document ID: US20140194080A1
- Status: Published application
- Kind: A1
- Application number: 14/137,081
- Filed: 2013-12-20
- Published: 2014-07-10
- Earliest claimed: 2013-01-04
- Assignees: Marvell World Trade Ltd.
- Applicants: Marvell World Trade Ltd.
- Inventors: Qiang LI; Brian T. BRUNN
- Web page: https://patentgrep.com/patent/US20140194080A1

## CPC

- H04B 1/10: Means associated with receiver for limiting or suppressing noise or interference
- H03F 1/025: {by using a signal derived from the input signal}
- H03F 1/32: Modifications of amplifiers to reduce non-linear distortion (by negative feedback H03F1/34)
- H03F 2200/102: A non-specified detector of a signal envelope being used in an amplifying circuit
- H03F 2200/511: Many discrete supply voltages or currents or voltage levels can be chosen by a control signal in an IC-block amplifier circuit
- H04B 17/0085: {using test signal generators}
- H04B 17/13: of power amplifiers, e.g. gain or non-linearity
- H04B: TRANSMISSION
- H03F: AMPLIFIERS

## Abstract

A method includes setting a circuit to a mode. A test tone having a first frequency is provided to the circuit for use in calibrating the circuit. A received signal is generated based on an output signal of the circuit, the received signal including a component having a second frequency that is a harmonic of the first frequency. A magnitude of the component having the second frequency in the received signal is measured. A delay of the circuit corresponding to the mode is adjusted according to the magnitude of the component.

## Claims

### Claim 1

A method comprising:
setting a circuit to a mode;
providing a test tone having a first frequency to the circuit for use in calibrating the circuit;
generating a received signal based on an output signal of the circuit, the received signal including a component having a second frequency that is a harmonic of the first frequency;
measuring a magnitude of the component having the second frequency in the received signal; and
adjusting a delay of the circuit corresponding to the mode according to the magnitude of the component.

### Claim 2 (depends on 1)

The method of claim 1, wherein the mode is a first mode, the test tone is a first test tone, the received signal is a first received signal, the output signal is a first output signal, and the delay is a first delay, and the method further comprises:
setting the circuit to a second mode;
providing a second test tone having a third frequency to the circuit for use in calibrating the circuit;
generating a second received signal based on a second output signal of the circuit, the second received signal including a component having a fourth frequency that is a harmonic of the third frequency;
measuring a magnitude of the component in the second received signal; and
adjusting a second delay of the circuit corresponding to the second mode according to the magnitude of the component in the second received signal.

### Claim 3 (depends on 1)

The method of claim 1, wherein the received signal corresponds to a gain of the circuit, and the second frequency is a second harmonic of the first frequency.

### Claim 4 (depends on 1)

The method of claim 1, wherein the received signal is a baseband signal based on the output signal of the circuit, the second frequency is a third harmonic of the first frequency.

### Claim 5 (depends on 4)

The method of claim 4, wherein the output signal is an RF signal.

### Claim 6 (depends on 1)

The method of claim 1, wherein measuring the magnitude of the component includes:
generating a harmonic signal having the second frequency;
generating a mixer output signal by frequency mixing the received signal and the harmonic signal; and
filtering the mixer output signal to remove high frequency components from the mixer output signal and generate a filtered output signal.

### Claim 7 (depends on 6)

The method of claim 6, wherein filtering the mixer output signal includes reducing a bandwidth of a low pass filter from an initial bandwidth until the filtered output signal converges.

### Claim 8 (depends on 1)

The method of claim 1, further including:
setting the delay of the circuit to a first delay value;
when the delay of the circuit is set to the first delay value, measuring the magnitude of the component to produce a first error component;
setting the delay of the circuit to a second delay value;
when the delay of the circuit is set to the second delay value, measuring the magnitude of the component to produce a second error component;
comparing the first error component to the second error component;
when the first error component is less than the second error component, setting a delay calibration associated with the mode to the first delay value; and
when the first error component is not less than the second error component, setting the delay calibration associated with the mode to the second delay value.

### Claim 9 (depends on 1)

The method of claim 1, wherein the circuit includes a transmitter.

### Claim 10 (depends on 1)

The method of claim 1, wherein the delay is an envelope tracking time alignment delay.

### Claim 11

A circuit comprising:
a test tone generator configured to provide a test tone having a first frequency as a baseband signal for the circuit, the circuit being set to a mode;
a power amplifier (PA) configured to receive an input signal modulated by the baseband signal;
an envelope tracking (ET) circuit the ET circuit including an ET delay circuit (ETDC) and configured to modulate a power supply voltage of the PA according to an envelope of the baseband signal; and
an ET delay feedback circuit configured to generate a received signal based on an output of the PA and measure a magnitude of a component having a second frequency in the received signal, the component having the second frequency being a harmonic of the first frequency,
wherein the ETDC adjusts a delay of the circuit corresponding to the mode according to the component.

### Claim 12 (depends on 11)

The circuit of claim 11, wherein the mode is a first mode, the test tone is a first test tone, the received signal is a first received signal, the output signal is a first output signal, and the delay is a first delay, and
wherein the ETDC is calibrated by:
setting the circuit to a second mode,
providing a second test tone having a third frequency to the circuit for use in calibrating the circuit,
generating a second received signal based on a second output signal of the circuit, the second received signal including a component having a fourth frequency that is a harmonic of the third frequency,
measuring a magnitude of the component in the second received signal, and
adjusting a second delay of the circuit corresponding to the second mode according to the magnitude of the component in the second received signal.

### Claim 13 (depends on 11)

The circuit of claim 11, wherein the received signal corresponds to a gain of the circuit, and the second frequency is a second harmonic of the first frequency.

### Claim 14 (depends on 11)

The circuit of claim 11, wherein the received signal is a baseband signal based on the output signal of the PA, the second frequency is a third harmonic of the first frequency.

### Claim 15 (depends on 14)

The circuit of claim 14, wherein the output signal of the PA is an RF signal.

### Claim 16 (depends on 11)

The circuit of claim 11, further comprising:
a digital frequency synthesizer configured to generate a harmonic signal having the second frequency and mix the received signal with the harmonic signal to output a mixer output signal; and
a low-pass filter to remove high frequency components from the mixer output signal and generate a filtered output signal.

### Claim 17 (depends on 16)

The circuit of claim 16, wherein the low-pass filter includes a digital Infinite Impulse Response (IIR) filter, and
wherein the digital frequency synthesizer and the low pass filer are included in the ET delay feedback circuit.

### Claim 18 (depends on 11)

The circuit of claim 11, wherein the ETDC is calibrated:
setting a delay of the ETDC to a first delay value;
when the delay of the ETDC is set to the first delay value, measuring the magnitude of the component to produce a first error component;
setting the delay of the ETDC to a second delay value;
when the delay of the ETDC is set to the second delay value, measuring the magnitude of the component to produce a second error component;
comparing the first error component to the second error component;
when the first error component is less than the second error component, setting a delay calibration of the ETDC associated with the mode to the first delay value; and
when the first error component is not less than the second error component, setting the delay calibration of the ETDC associated with the mode to the second delay value.

### Claim 19 (depends on 11)

The circuit of claim 11, wherein the circuit includes a transmitter.

### Claim 20 (depends on 11)

The circuit of claim 11, wherein the ET circuit performs envelope tracking, and the delay is an envelope tracking time alignment delay.