# US 2014/0194077 A1 · Passive Interface for an Electronic Memory Device

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- Number: US 2014/0194077 A1
- Document ID: US20140194077A1
- Status: Published application
- Kind: A1
- Application number: 13/883,057
- Filed: 2012-01-18
- Published: 2014-07-10
- Earliest claimed: 2011-02-01
- Assignees: 3M Innovative Properties Company
- Applicants: 3M Innovative Properties Company
- Inventors: Paul D. Henry
- Web page: https://patentgrep.com/patent/US20140194077A1

## CPC

- G11C 5/06: Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C 5/066: {Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals}
- G11C 7/10: Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C 16/30: Power supply circuits
- H04B 1/385: {Transceivers carried on the body, e.g. in helmets}
- H04R 1/1058: {Manufacture or assembly}
- H04R 1/1091: {Details not provided for in groups H04R1/1008 - H04R1/1083}
- H04R 29/001: {for loudspeakers (H04R29/007 takes precedence)}
- Y10T 29/49117: Conductor or circuit manufacturing
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H04B: TRANSMISSION
- H04R: LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS (producing sounds with frequency not determined by supply frequency G10K)
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

A passive interface for connecting an electronic memory device to an exterior circuit is provided. The passive interface includes a signal connection point, a power connection point and a ground connection point on an electronic memory device. A first passive component forms an electrical connection between the signal connection point and the power connection point. A second passive component forms an electrical connection between the power connection point and the ground connection point. And the power connection point receives a conditioned voltage signal through the electrical connection between the signal connection point and the power connection point. Such a passive interface can be used in a variety of devices, including headsets for intrinsically save applications.

## Claims

### Claim 1

A passive interface for an electronic memory device, the passive interface comprising:
a signal connection point, a power connection point and a ground connection point on an electronic memory device;
a first passive component forming an electrical connection between the signal connection point and the power connection point;
a second passive component forming an electrical connection between the power connection point and the ground connection point;
wherein the power connection point receives a conditioned voltage signal through the electrical connection between the signal connection point and the power connection point.

### Claim 2 (depends on 1)

The passive interface of claim 1, wherein the signal connection point is a transient signal connection point and wherein the power connection point is a direct current power connection point.

### Claim 3 (depends on 1)

The passive interface of claim 1, wherein the passive interface is part of an intrinsically safe system.

### Claim 4 (depends on 1)

The passive interface of claim 1, wherein the first passive component comprises a resistor and the second passive component comprises a capacitor.

### Claim 5 (depends on 4)

The passive interface of claim 4, wherein the resistor has an impedance between 1 ohm and 100 k ohms.

### Claim 6 (depends on 4)

The passive interface of claim 4, wherein the capacitor has a capacitance between 0.1 μfarads and 1.0 farad.

### Claim 7 (depends on 1)

The passive interface of claim 1, wherein the first passive component comprises an inductor and the second passive component comprises a resistor.

### Claim 8 (depends on 7)

The passive interface of claim 7, wherein the inductor has an inductance between 0.001 henries and 1.0 henry.

### Claim 9 (depends on 7)

The passive interface of claim 7, wherein the resistor has resistance between 10 ohms and 1 k ohms.

### Claim 10 (depends on 1)

The passive interface of claim 1, wherein the data is transmitted through the signal connection point.

### Claim 11 (depends on 1)

The passive interface of claim 1, wherein the signal connection point is an input and output connection point.

### Claim 12 (depends on 1)

The passive interface of claim 1, wherein the signal connection point is a clock connection point.

### Claim 13 (depends on 1)

The passive interface of claim 1, wherein the electronic memory device is capable of transmitting and receiving data through the signal connection point.

### Claim 14 (depends on 1)

The passive interface of claim 1, wherein the passive interface is comprised in a headset.

### Claim 15 (depends on 14)

The passive interface of claim 14, wherein the headset is a push-to-talk headset.

### Claim 16

A method of connecting an exterior circuit to an electronic memory device, the method comprising:
electrically connecting a signal line of the exterior circuit to a signal connection point on the electronic memory device;
electrically connecting a first passive component between the signal connection point and a power connection point on the electronic memory device;
electrically connecting a second passive component between the power connection point and a ground connection point on the electronic memory device;
electrically connecting a ground line of the exterior circuit to the ground connection point;
wherein the power connection point receives a conditioned voltage signal through the electrical connection between the signal connection point and the power connection point.

### Claim 17 (depends on 16)

The method of claim 16, wherein the signal connection point is a transient signal connection point and wherein the power connection point is a direct current power connection point.

### Claim 18 (depends on 16)

The method of claim 16, wherein the passive interface is part of an intrinsically safe system.

### Claim 19 (depends on 16)

The method of claim 16, wherein the first passive component comprises a resistor and wherein the second passive component comprises a capacitor.

### Claim 20 (depends on 16)

The method of claim 16, wherein the second passive component comprises an inductor and wherein the second passive component comprises a resistor.

### Claim 21 (depends on 16)

The method of claim 16, wherein the electronic memory device is capable of transmitting and receiving data through the signal connection point.

### Claim 22 (depends on 16)

The method of claim 16, wherein the passive interface is comprised in a headset.

### Claim 23 (depends on 16)

The method of claim 16, wherein the electronic memory device is a serial EEPROM.

### Claim 24 (depends on 22)

The method of claim 22, wherein the electronic memory device is used to store information related to at least one of: age, maintenance history, exposure, and type.

### Claim 25

A communications headset comprising:
a push-to-talk headset comprising a transducer, a speaker, a microphone and an electronic memory device;
wherein the electronic memory device is provided with a passive interface;
wherein the passive interface comprises:
a signal connection point, a power connection point and a ground connection point on an electronic memory device;
a first passive component forming an electrical connection between the signal connection point and the power connection point;
a second passive component forming an electrical connection between the power connection point and the ground connection point; and
wherein the power connection point receives a conditioned voltage signal through the electrical connection between the signal connection point and the power connection point.