# US 2014/0193970 A1 · Isolated wire structures with reduced stress, methods of manufacturing and design structures

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- Number: US 2014/0193970 A1
- Document ID: US20140193970A1
- Status: Published application
- Kind: A1
- Application number: 14/076,707
- Filed: 2013-11-11
- Published: 2014-07-10
- Earliest claimed: 2013-01-04
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Jeffrey P. Gambino; Zhong-Xiang He; Tom C. Lee
- Web page: https://patentgrep.com/patent/US20140193970A1

## CPC

- H10P 50/71: {using masks for conductive or resistive materials}
- H10D 64/011: {of electrodes ohmically coupled to a semiconductor}
- H10W 20/039: {also covering sidewalls of the conductive structures}
- H10W 20/063: {by forming conductive members before forming protective insulating material}
- H10W 20/077: {on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence)}
- H10W 20/081: {by forming openings in the dielectric parts}
- H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants
- H10W 20/48: Insulating materials thereof
- H10W 20/425: {Barrier, adhesion or liner layers}
- H10W 20/497: {Inductive arrangements or effects of, or between, wiring layers}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An integrated circuit (IC) including a set of isolated wire structures disposed within a layer of the IC, methods of manufacturing the same and design structures are disclosed. The method includes forming adjacent wiring structures on a same level, with a space therebetween. The method further includes forming a capping layer over the adjacent wiring structures on the same level, including on a surface of a material between the adjacent wiring structures. The method further includes forming a photosensitive material over the capping layer. The method further includes forming an opening in the photosensitive material between the adjacent wiring structures to expose the capping layer. The method further includes removing the exposed capping layer.

## Claims

### Claim 1

A method comprising:
forming a capping layer over separate metal wiring structures, including on a surface of a dielectric layer exposed within a space between the separate metal wiring structures;
forming a photosensitive material over the capping layer;
forming an opening in the photosensitive material between the separate metal wiring structures to expose the capping layer; and
removing the exposed capping layer.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
forming a bond pad and wiring structures in the dielectric layer, at a predetermined level of a structure;
forming vias in the dielectric layer, exposing the bond pad and the wiring structures;
forming a diffusion barrier layer within the vias and exposed portions of the dielectric layer;
forming a metal over the wiring structures, at a higher level of the structure, wherein the forming of the metal comprises:
blocking a via over the bond pad; and
forming the metal in the vias over the wiring structures and over portions of the diffusion barrier layer adjacent to the vias over the wiring structures; and
patterning of the metal to form the separate metal wiring structures with the space therebetween.

### Claim 3 (depends on 2)

The method of claim 2, wherein the metal is copper formed by an electroplating process.

### Claim 4 (depends on 2)

The method of claim 2, wherein:
the photosensitive material is a positive tone polyimide material; and
the forming of the opening in the positive tone polyimide material comprises exposing the positive tone polyimide material to energy through a patterned mask, which will result in dissolution of portions of the positive tone polyimide material over the bond pad and between the two separate metal wiring structures, during a subsequent develop step.

### Claim 5 (depends on 4)

The method of claim 4, further comprising hardening the positive tone polyimide material to form a mask, wherein:
the hardening comprises an annealing process; and
the removing the exposed capping layer comprises a reactive ion etching process, using the hardened positive tone polyimide material as the mask.

### Claim 6 (depends on 5)

The method of claim 5, wherein the reactive ion etching isolates the separate metal wiring structures.

### Claim 7 (depends on 5)

The method of claim 5, wherein the reactive ion etching forms islands of the capping layer.

### Claim 8 (depends on 1)

The method of claim 1, wherein the capping layer is SiN or TaN.

### Claim 9 (depends on 1)

The method of claim 1, wherein the separate metal wiring structures are two separate metal wiring structures.