# US 2014/0192930 A1 · Signal receiving apparatus and signal receiving method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0192930 A1 - Document ID: US20140192930A1 - Status: Published application - Kind: A1 - Application number: 13/956,545 - Filed: 2013-08-01 - Published: 2014-07-10 - Earliest claimed: 2013-01-07 - Assignees: MStar Semiconductor, Inc. - Applicants: MStar Semiconductor, Inc. - Inventors: YU-CHE SU; Tai-Lai Tung - Web page: https://patentgrep.com/patent/US20140192930A1 ## CPC - H04L 25/061: {providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset (removal of DC offset in coupling arrangements H04L25/029, H04L25/0296)} - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A signal receiving apparatus, applicable in a wireless system calibrating direct current offset, includes: an adjusting circuit arranged to receive an receiving signal having a first DC (Direct Current) signal, and adjust the first DC signal to generate the receiving signal having a second DC signal according to an adjusting signal; a first arithmetic circuit arranged to generate an error signal according to the second DC signal and a target DC signal; and a second arithmetic circuit arranged to calculate an error signal slope according to the error signal, and update the adjusting signal according to the error signal slope and the error signal. ## Claims ### Claim 1 A signal receiving apparatus, applicable in a wireless system, comprising: an adjustment circuit, configured to receive a received signal having a first direct current (DC) signal and to adjust the first DC signal according to an adjustment signal to generate an adjusted receiving signal having a second DC signal; a first calculation circuit, configured to generate an error signal according to the second DC signal and a target DC signal; and a second calculation circuit, configured to generate a change rate according to the error signal and to update the adjustment signal according to the change rate and the error signal. ### Claim 2 (depends on 1) The signal receiving apparatus of claim 1, further comprising a storage circuit, wherein if it is determined that the second DC signal approximately equals the target DC signal, the second calculation circuit stores a reference value corresponding to the updated adjustment signal in the storage circuit. ### Claim 3 (depends on 2) The signal receiving apparatus of claim 2, wherein the first calculation circuit further generates an input power level signal, the signal receiving apparatus further comprising: a gain control circuit, configured to generate a gain control signal according to the input power level signal; and a variable gain amplifier, configured to generate the received signal by applying gain control on a first down-converted signal according to the gain control signal; wherein when the input power level signal of a second down-converted signal received by the signal receiving apparatus equals to the input power level signal of the first down-converted signal, the gain control circuit is further configured to control the storage circuit outputting the reference value to the second calculation circuit according to the input power level signal, and the second calculation circuit generates the updated adjustment signal according to the reference value. ### Claim 4 (depends on 1) The signal receiving apparatus of claim 1, further comprising: an oscillator, configured to generate an oscillation signal; an antenna, configured to receive a wireless signal to generate a radio frequency (RF) signal; and a mixer, configured to generate the first down-converted frequency signal according to the oscillation signal and the RF signal; wherein the oscillation signal is transmitted to the mixer via the antenna, and the mixer is further configured to mix the oscillation signal from the antenna and the oscillation signal from the oscillator to generate the first DC signal of the received signal. ### Claim 5 (depends on 1) The signal receiving apparatus of claim 1, wherein the first calculation circuit comprises: an analog to digital converter (ADC), configured to convert the second DC signal from analog form to digital form; and a first digital processing circuit, configured to calculate the error between the second DC signal and the target DC signal to generate the error signal. ### Claim 6 (depends on 5) The signal receiving apparatus of claim 5, wherein the target DC signal is a DC bias signal of the ADC. ### Claim 7 (depends on 5) The signal receiving apparatus of claim 5, wherein the second calculation circuit comprises: a second digital processing circuit, configured to generate the change rate according to the error signal and to generate the updated adjustment signal according to the change rate and the error signal; and a digital to analog (DAC) converter, configured to convert the updated adjustment signal from digital form to analog form and to transmit the updated adjustment signal in analog form to the adjustment circuit. ### Claim 8 (depends on 5) The signal receiving apparatus of claim 5, wherein the first digital processing circuit further comprises: a first logic circuit, configured to generate a differential calculus signal according to the second DC signal and a prior DC signal; a second logic circuit, configured to generate an integral calculus signal and the prior DC signal by operating integral calculus on the differential calculus signal; and a third logic circuit, configured to generate the error signal according to the integral calculus signal and the target DC signal. ### Claim 9 (depends on 8) The signal receiving apparatus of claim 8, wherein the first logic circuit is a minus operator, which subtracts the prior DC signal from the second DC signal to generate the differential calculus signal. ### Claim 10 (depends on 8) The signal receiving apparatus of claim 8, wherein the third logic circuit comprises a minus operator which subtracts the target DC signal from the integral calculus signal to generate the error signal. ### Claim 11 (depends on 7) The signal receiving apparatus of claim 7, wherein the second digital processing circuit further comprises: a first logic circuit, configured to generate the change rate according to the error signal and a prior error signal; a second logic circuit, coupled to the first logic circuit, configured to generate an adjusted change rate according to the change rate and a first parameter; a third logic circuit, configured to generate an adjusted error signal according to the error signal and a second parameter; and a fourth logic circuit, coupled to the second and the third logic circuits, configured to update the adjustment signal according to the error signal, the adjusted change rate, the adjusted error signal, and a third parameter. ### Claim 12 (depends on 11) The signal receiving apparatus of claim 11, wherein the first logic circuit is a minus operator, which subtracts the prior error signal from the error signal to generate the change rate. ### Claim 13 (depends on 11) The signal receiving apparatus of claim 11, wherein the second logic circuit is a multiplier, which multiplies the change rate with the first parameter to generate the adjusted change rate. ### Claim 14 (depends on 11) The signal receiving apparatus of claim 11, wherein the third logic circuit is a multiplier, which multiplies the error signal with the second parameter to generate the adjusted error signal. ### Claim 15 (depends on 11) The signal receiving apparatus of claim 11, wherein the fourth logic circuit is configured to generate an integral calculus signal by operating integral calculus on the error signal, to adjust the integral calculus signal according to the third parameter to generate an adjusted integral calculus signal, and to accumulate the adjusted integral calculus signal, the adjusted change rate, and the adjusted error signal to update the adjustment signal. ### Claim 16 A signal receiving method applicable to a wireless system, comprising: receiving a received signal having a first DC signal and adjusting the first DC signal according to an adjustment signal to generate an adjusted received signal having a second DC signal; generating an error signal according to the second DC signal and a target DC signal; and calculating a change rate according to the error signal and updating the adjustment signal according to the change rate and the error signal. ### Claim 17 (depends on 16) The signal receiving method of claim 16, further comprising: storing a reference value corresponding to the updated adjustment signal in a storage circuit if it is determined that the second DC signal approximately equals the target DC signal. ### Claim 18 (depends on 17) The signal receiving method of claim 17, further comprising: generating an input power level signal according to the received signal; generating a gain control signal according to the input power level signal; generating the received signal by applying gain control on a first down-converted signal according to the gain control signal; controlling the storage circuit outputting the reference value; and updating the adjustment signal according to the reference value when the input power level signal of a received second down-converted signal equals to the input power level signal of the first down-converted signal. ### Claim 19 (depends on 16) The signal receiving method of claim 16, wherein the step of generating the error signal according to the second DC signal and the target DC signal further comprising: converting the second DC signal from analog form to digital form; and calculating the error between the second DC signal and the target DC signal to generate the error signal. ### Claim 20 (depends on 19) The signal receiving method of claim 19, wherein the step of calculating the change rate according to the error signal and updating the adjustment signal according to the change rate and the error signal further comprising: calculating the change rate according to the error signal; updating the adjustment signal according to the change rate and the error signal; and converting the adjustment signal from digital form to analog form.