# US 2014/0192901 A1 · Conditional signaling of picture order count timing information for video timing in video coding

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- Number: US 2014/0192901 A1
- Document ID: US20140192901A1
- Status: Published application
- Kind: A1
- Application number: 14/061,130
- Filed: 2013-10-23
- Published: 2014-07-10
- Earliest claimed: 2013-01-07
- Assignees: QUALCOMM Incorporated
- Applicants: QUALCOMM Incorporated
- Inventors: Ye-Kui Wang
- Web page: https://patentgrep.com/patent/US20140192901A1

## CPC

- H04N 19/70: characterised by syntax aspects related to video coding, e.g. related to compression standards
- H04N 19/149: by estimating the code amount by means of a model, e.g. mathematical model or statistical model
- H04N 19/44: Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
- H04N 19/46: Embedding additional information in the video signal during the compression process (H04N19/517, H04N19/68, H04N19/70 take precedence)
- H04N 19/513: Processing of motion vectors
- H04N 19/85: using pre-processing or post-processing specially adapted for video compression
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION

## Abstract

In an example, the disclosure provides for encoding pictures of a video sequence to generate a coded video sequence comprising the encoded pictures and signaling timing parameters for the coded video sequence by directly signaling a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence. Another example provides for receiving timing parameters for a coded video sequence that include a condition for signaling a number of clock ticks corresponding to a difference of POC values equal to 1 directly in at least one of a VPS syntax structure referenced by the coded video sequence and an SPS syntax structure referenced by the coded video sequence.

## Claims

### Claim 1

A method for processing video data, the method comprising:
receiving a coded video sequence comprising encoded pictures of a video sequence; and
receiving timing parameters for the coded video sequence that include a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 directly in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence.

### Claim 2 (depends on 1)

The method of claim 1, wherein receiving the coded video sequence comprises receiving a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures, the method further comprising:
verifying conformance of the coded bitstream to a video buffering model of a coded picture buffer and a decoded picture buffer defined, at least in part, by the condition.

### Claim 3 (depends on 1)

The method of claim 1, wherein receiving the timing parameters for the coded video sequence further comprises:
receiving a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

### Claim 4 (depends on 1)

The method of claim 1, wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

### Claim 5 (depends on 1)

The method of claim 1, wherein the condition does not include a dependency on a syntax element in a hypothetical reference decoder (HRD) parameters syntax structure of the VPS syntax structure or the SPS syntax structure.

### Claim 6 (depends on 1)

The method of claim 1, wherein the VPS syntax structure includes the condition.

### Claim 7 (depends on 6)

The method of claim 6, wherein the VPS syntax structure includes the condition as a vps_poc_proportional_to_timing_flag syntax element.

### Claim 8 (depends on 1)

The method of claim 1, wherein the SPS syntax structure includes the condition.

### Claim 9 (depends on 8)

The method of claim 8, wherein SPS syntax structure includes the condition as a sps_poc_proportional_to_timing_flag syntax element.

### Claim 10

A method for encoding video data, the method comprising:
encoding pictures of a video sequence to generate a coded video sequence comprising the encoded pictures; and
signaling timing parameters for the coded video sequence by directly signaling a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence.

### Claim 11 (depends on 10)

The method of claim 10, wherein the condition does not include a dependency on a syntax element signaled in a hypothetical reference decoder (HRD) parameters syntax structure.

### Claim 12 (depends on 10)

The method of claim 10, wherein signaling the timing parameters further comprises:
signaling a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

### Claim 13 (depends on 10)

The method of claim 10, wherein directly signaling the condition comprises signaling the condition in the VPS syntax structure.

### Claim 14 (depends on 13)

The method of claim 13, wherein signaling the condition in the VPS syntax structure comprises signaling the condition as a vps_poc_proportional_to_timing_flag syntax element.

### Claim 15 (depends on 10)

The method of claim 10, wherein directly signaling the condition comprises signaling the condition in the SPS syntax structure.

### Claim 16 (depends on 15)

The method of claim 15, wherein signaling the condition in the SPS syntax structure comprises signaling the condition as a sps_poc_proportional_to_timing_flag syntax element.

### Claim 17 (depends on 10)

The method of claim 10, further comprising:
generating a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures,
wherein the timing parameters at least in part define a video buffering model of a coded picture buffer and a decoded picture buffer for verifying conformance of the coded bitstream.

### Claim 18 (depends on 10)

The method of claim 10, wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

### Claim 19

A device for processing video data comprising:
a processor configured to:
receive a coded video sequence comprising encoded pictures of a video sequence; and
receive timing parameters for the coded video sequence that include a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 directly in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence.

### Claim 20 (depends on 19)

The device of claim 19,
wherein to receive the coded video sequence the processor is further configured to receive a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures, and
wherein the processor is further configured to verify conformance of the coded bitstream to a video buffering model of a coded picture buffer and a decoded picture buffer defined, at least in part, by the condition.

### Claim 21 (depends on 19)

The device of claim 19, wherein to receive the timing parameters for the coded video sequence the processor is further configured to receive a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

### Claim 22 (depends on 19)

The device of claim 19, wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

### Claim 23 (depends on 19)

The device of claim 19, wherein the condition does not include a dependency on a syntax element in a hypothetical reference decoder (HRD) parameters syntax structure of the VPS syntax structure or the SPS syntax structure.

### Claim 24 (depends on 19)

The device of claim 19, wherein the VPS syntax structure includes the condition.

### Claim 25 (depends on 24)

The device of claim 24, wherein the VPS syntax structure includes the condition as a vps_poc_proportional_to_timing_flag syntax element.

### Claim 26 (depends on 19)

The device of claim 19, wherein the SPS syntax structure includes the condition.

### Claim 27 (depends on 26)

The device of claim 26, wherein SPS syntax structure includes the condition as a sps_poc_proportional_to_timing_flag syntax element.

### Claim 28

A device for encoding video data comprising:
a processor configured to:
encode pictures of a video sequence to generate a coded video sequence comprising the encoded pictures; and
signal timing parameters for the coded video sequence by directly signaling a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence.

### Claim 29 (depends on 28)

The device of claim 28, wherein the condition does not include a dependency on a syntax element signaled in a hypothetical reference decoder (HRD) parameters syntax structure.

### Claim 30 (depends on 28)

The device of claim 28, wherein to signal the timing parameters the processor is configured to signal a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

### Claim 31 (depends on 28)

The device of claim 28, wherein to directly signal the condition the processor is configured to signal the condition in the VPS syntax structure.

### Claim 32 (depends on 31)

The device of claim 31, wherein to signal the condition in the VPS syntax structure the processor is configured to signal the condition as a vps_poc_proportional_to_timing_flag syntax element.

### Claim 33 (depends on 28)

The device of claim 28, wherein to directly signal the condition the processor is configured to signal the condition in the SPS syntax structure.

### Claim 34 (depends on 33)

The device of claim 33, wherein to signal the condition in the SPS syntax structure the processor is configured to signal the condition as a sps_poc_proportional_to_timing_flag syntax element.

### Claim 35 (depends on 28)

The device of claim 28, wherein the processor is further configured to
generate a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures,
wherein the timing parameters at least in part define a video buffering model of a coded picture buffer and a decoded picture buffer for verifying conformance of the coded bitstream.

### Claim 36 (depends on 28)

The device of claim 28, wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

### Claim 37

A device for processing video data comprising:
means for receiving a coded video sequence comprising encoded pictures of a video sequence; and
means for receiving timing parameters for the coded video sequence that include a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 directly in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence.

### Claim 38 (depends on 37)

The device of claim 37, wherein the means for receiving the coded video sequence comprise means for receiving a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures, the device further comprising:
means for verifying conformance of the coded bitstream to a video buffering model of a coded picture buffer and a decoded picture buffer defined, at least in part, by the condition.

### Claim 39 (depends on 37)

The device of claim 37, wherein the means for receiving the timing parameters for the coded video sequence further comprise:
means for receiving a time scale and a number of units in a clock tick in at least one of the VPS syntax structure and the SPS syntax structure.

### Claim 40 (depends on 37)

The device of claim 37, wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

### Claim 41 (depends on 37)

The device of claim 37, wherein the condition does not include a dependency on a syntax element in a hypothetical reference decoder (HRD) parameters syntax structure of the VPS syntax structure or the SPS syntax structure.

### Claim 42

A non-transitory computer readable storage medium storing instructions that upon execution by one or more processors cause the one or more processors to:
receive a coded video sequence comprising encoded pictures of a video sequence; and
receive timing parameters for the coded video sequence that include a condition for signaling a number of clock ticks corresponding to a difference of picture order count (POC) values equal to 1 directly in at least one of a video parameter set (VPS) syntax structure referenced by the coded video sequence and a sequence parameter set (SPS) syntax structure referenced by the coded video sequence.

### Claim 43 (depends on 37)

The non-transitory computer readable storage medium of claim 37,
wherein to receive the coded video sequence the instructions further cause the one or more processors to receive a coded bitstream comprising a sequence of bits that forms a representation of the encoded pictures, and
wherein the instructions further cause the one or more processors to verify conformance of the coded bitstream to a video buffering model of a coded picture buffer and a decoded picture buffer defined, at least in part, by the condition.

### Claim 44 (depends on 37)

The non-transitory computer readable storage medium of claim 37, wherein to receive the timing parameters for the coded video sequence the instructions further cause the one or more processors to receive a time scale and a number of units in at least one of the VPS syntax structure and the SPS syntax structure.

### Claim 45 (depends on 37)

The non-transitory computer readable storage medium of claim 37, wherein the timing parameters comprise timing parameters for hypothetical reference decoding operations.

### Claim 46 (depends on 37)

The non-transitory computer readable storage medium of claim 37, wherein the condition does not include a dependency on a syntax element in a hypothetical reference decoder (HRD) parameters syntax structure of the VPS syntax structure or the SPS syntax structure.
