# US 2014/0192861 A1 · Method and apparatus for reordered binarization of syntax elements in cabac > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0192861 A1 - Document ID: US20140192861A1 - Status: Published application - Kind: A1 - Application number: 14/234,151 - Filed: 2012-08-02 - Published: 2014-07-10 - Earliest claimed: 2011-08-04 - Assignees: Mediatek Inc. - Inventors: Tzu-Der Chuang; Ching-Yeh Chen; Yu-Wen Huang - Web page: https://patentgrep.com/patent/US20140192861A1 ## CPC - H03M 7/4018: {Context adapative binary arithmetic codes [CABAC]} - H04N 19/159: Prediction type, e.g. intra-frame, inter-frame or bidirectional frame prediction - H04N 19/21: with binary alpha-plane coding for video objects, e.g. context-based arithmetic encoding [CAE] - H04N 19/436: using parallelised computational arrangements - H04N 19/70: characterised by syntax aspects related to video coding, e.g. related to compression standards - H04N 19/88: involving rearrangement of data among different coding units, e.g. shuffling, interleaving, scrambling or permutation of pixel data or permutation of transform coefficient data among different blocks - H04N 19/91: Entropy coding, e.g. variable length coding [VLC] or arithmetic coding - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION ## Abstract A method and apparatus of context-based adaptive binary arithmetic encoding/decoding for syntax elements of one or more blocks are disclosed. According to one embodiment of the present invention, the binarization results of the x and y positions of the last significant coefficient of a transform unit are reordered by collecting the bypass bins together. According to another embodiment of the present invention, binarization results of syntax elements from two or more of four Intra N×N prediction units, including prev_intra_luma_pred_flag, rem_intra_luma_pred_mode, and mpm_idx are reordered by collecting the bypass bins together. In yet another embodiment according to the present invention, the binarization results of other syntax elements are also reordered by collecting bypass bins together. Furthermore, the above reordering of binarization results may be used for binarization results corresponding to a block and its neighboring blocks. ## Claims ### Claim 1 A method of context-based adaptive binary arithmetic decoding for syntax elements of one or more TUs (transform units), the method comprising: decoding reordered bins associated with said one or more TUs into a first part and a second part, wherein the first part is processed by regular decoding and the second part is processed by bypass decoding; determining first regular bins and second regular bins from the first part associated with said one or more TUs; determining first bypass bins and second bypass bins from the second part associated with said one or more TUs; determining a first codeword corresponding to a first syntax element for each TU, wherein the first codeword comprises the first regular bins and the first bypass bins, and wherein the first syntax element is associated with x-position of a last significant coefficient in said each TU; determining a second codeword corresponding to a second syntax element corresponding for said each TU, wherein the second codeword comprises the second regular bins and the second bypass bins, and wherein the second syntax element is associated with y-position of the last significant coefficient in said each TU; and providing the first syntax element and the second syntax element for said each TU. ### Claim 2 (depends on 1) The method of claim 1, wherein said one or more TUs comprises a current TU and a neighboring TU. ### Claim 3 A method of context-based adaptive binary arithmetic coding for syntax elements of one or more TUs (transform units), the method comprising: receiving a first syntax element, wherein the first syntax element is associated with x-position of a last significant coefficient for each TU; receiving a second syntax element, wherein the second syntax element is associated with y-position of the last significant coefficient for said each TU; determining a first codeword corresponding to the first syntax element for said each TU, wherein the first codeword comprises first regular bins and first bypass bins; determining a second codeword corresponding to the second syntax element for said each TU, wherein the second codeword comprises second regular bins and second bypass bins; determining a first part comprising the first regular bins and the second regular bins associated with said one or more TUs; determining a second part comprising the first bypass bins and the second bypass bins associated with said one or more TUs; and providing the first part and the second part associated with said one or more TUs for binary arithmetic coding, wherein the first part is processed by regular coding and the second part is processed by bypass coding. ### Claim 4 (depends on 3) The method of claim 3, wherein said one or more TUs comprises a current TU and a neighboring TU. ### Claim 5 A method of context-based adaptive binary arithmetic decoding for syntax elements of a coding unit, wherein the coding unit is partitioned into four Pus (prediction units) in an N×N intra prediction mode, the method comprising: receiving reordered bins comprising a first part and a second part, wherein the first part comprises regular bins associated with each of two or more Pus and the second part comprises first bypass bins or second bypass bins associated with said each of two or more Pus; determining a first codeword corresponding to a first syntax element for said each of two or more Pus, wherein the first codeword comprises the regular bins, and wherein the first syntax element corresponds to an indication of intra prediction mode selection for said each of two or more Pus; determining a second codeword corresponding to a second syntax element for said each of two or more Pus if the indication corresponds to most-probable-mode coding, wherein the second syntax element corresponds to an index for a most probable mode, and wherein the second codeword comprises the first bypass bins; determining a third codeword corresponding to a third syntax element for said each of two or more Pus if the indication corresponds to remaining-prediction-mode coding, wherein the third syntax element corresponds to a remaining prediction mode, wherein the third codeword comprises the second bypass bins; and providing the first syntax element, the second syntax element and the third syntax element for said each of two or more Pus. ### Claim 6 (depends on 5) The method of claim 5, wherein the first part comprises the regular bins associated with said four Pus, and wherein the second part comprises the first bypass bins or the second bypass bins associated with each of said four Pus. ### Claim 7 A method of context-based adaptive binary arithmetic coding for syntax elements of a coding unit, wherein the coding unit is partitioned into four Pus (prediction units) in an N×N intra prediction mode, the method comprising: receiving a first syntax element for each PU, wherein the first syntax element corresponds to an indication of intra prediction mode selection for said each PU; receiving a second syntax element for said each PU if the indication corresponds to most-probable-mode coding, wherein the second syntax element corresponds to an index for a most probable mode; receiving a third syntax element for said each PU if the indication corresponds to remaining-prediction-mode coding, wherein the third syntax element corresponds to a remaining prediction mode; determining a first codeword for the first syntax element for said each PU, wherein the first codeword comprises regular bins; determining a second codeword for the second syntax element for said each PU if the indication corresponds to the most-probable-mode coding, wherein the second codeword comprises first bypass bins; determining a third codeword for the third syntax element for said each PU if the indication corresponds to the remaining-prediction-mode coding, wherein the third codeword comprises second bypass bins; determining a first part, wherein the first part comprises the regular bins associated with two or more Pus; determining a second part, wherein the second part comprises the first bypass bins or the second bypass bins associated with each of said two or more Pus; and providing the first part and the second part for binary arithmetic coding, wherein the first part is processed by regular coding and the second part is processed by bypass coding. ### Claim 8 (depends on 7) The method of claim 7, wherein the first part comprises the regular bins associated with said four Pus, and wherein the second part comprises the first bypass bins or the second bypass bins associated with each of said four Pus. ### Claim 9 A method of context-based adaptive binary arithmetic decoding for syntax elements of one or more blocks, the method comprising: decoding reordered bins associated with said one or more blocks into regular bins and a first part, wherein the regular bins are processed by regular decoding and the first part is processed by bypass decoding; determining first bypass bins and second bypass bins from the first part associated with said one or more blocks; determining a first codeword corresponding to a first syntax element for each block, wherein the first codeword comprises the first bypass bins; determining a second codeword corresponding to a second syntax element corresponding for said each block, wherein the second codeword comprises the second bypass bins, wherein at least one of the first codeword and the second codeword further comprises the regular bins, and wherein the first syntax element and the second syntax element are selected from a syntax element group consisting of syntax associated with SAO parameters, ALF parameters, coding unit parameters, mode coding parameters, motion parameters, and coefficient coding; and providing the first syntax element and the second syntax element for said each block. ### Claim 10 (depends on 9) The method of claim 9, wherein the regular bins associated with said at least one of the first codeword and the second codeword from said one or more blocks are collected in a second part. ### Claim 11 (depends on 9) The method of claim 9, wherein said one or more blocks comprises a current block and a neighboring. ### Claim 12 (depends on 9) The method of claim 9, wherein first syntax element and the second syntax correspond to a same syntax from different blocks. ### Claim 13 A method of context-based adaptive binary arithmetic coding for syntax elements of one or more blocks, the method comprising: receiving a first syntax element and a second syntax element from one or more blocks, wherein the first syntax element and the second syntax element are selected from a syntax element group consisting of syntax associated with SAO parameters, ALF parameters, coding unit parameters, mode coding parameters, motion parameters, and coefficient coding; determining a first codeword corresponding to the first syntax element, wherein the first codeword comprises first bypass bins; determining a second codeword corresponding to the second syntax element, wherein the second codeword comprises second bypass bins, and wherein at least one of the first codeword and the second codeword comprises regular bins; determining a first part comprising the first bypass bins and the second bypass bins associated with said one or more blocks; and providing the first part associated with said one or more blocks for binary arithmetic coding, wherein the first part is processed by bypass coding. ### Claim 14 (depends on 13) The method of claim 13, further comprising determining a second part comprising the regular bins associated with said one or more blocks and providing the second part for the binary arithmetic coding, wherein the second part is processed by regular coding. ### Claim 15 (depends on 13) The method of claim 13, wherein said one or more blocks comprises a current block and a neighboring. ### Claim 16 (depends on 13) The method of claim 13, wherein first syntax element and the second syntax correspond to a same syntax from different blocks. ### Claim 17 A device of context-based adaptive binary arithmetic decoding for syntax elements of one or more TUs (transform units), the device comprising: a first circuit configured to decode reordered bins associated with said one or more TUs into a first part and a second part, wherein the first part is processed by regular decoding and the second part is processed by bypass decoding; a second circuit configured to determine first regular bins and second regular bins from the first part associated with said one or more TUs; a third circuit configured to determine first bypass bins and second bypass bins from the second part associated with said one or more TUs; a fourth circuit configured to determine a first codeword corresponding to a first syntax element for each TU, wherein the first codeword comprises the first regular bins and the first bypass bins, and wherein the first syntax element is associated with x-position of a last significant coefficient in said each TU; a fifth circuit configured to determine a second codeword corresponding to a second syntax element corresponding for said each TU, wherein the second codeword comprises the second regular bins and the second bypass bins, and wherein the second syntax element is associated with y-position of the last significant coefficient in said each TU; and an interface circuit configured to provide the first syntax element and the second syntax element for said each TU. ### Claim 18 (depends on 17) The device of claim 17, wherein two or more of the first circuit, the second circuit, the third circuit, the fourth circuit, the fifth circuit, and the interface circuit are implemented by an integrated circuit. ### Claim 19 A device for context-based adaptive binary arithmetic coding for syntax elements of one or more TUs (transform units), the device comprising: a first interface circuit configured to receive a first syntax element, wherein the first syntax element is associated with x-position of a last significant coefficient for each TU; a second interface circuit configured to receive a second syntax element, wherein the second syntax element is associated with y-position of the last significant coefficient for said each TU; a first circuit configured to determine a first codeword corresponding to the first syntax element for said each TU, wherein the first codeword comprises first regular bins and first bypass bins; a second circuit configured to determine a second codeword corresponding to the second syntax element for said each TU, wherein the second codeword comprises second regular bins and second bypass bins; a third circuit configured to determine a first part comprising the first regular bins and the second regular bins associated with said one or more TUs; a fourth circuit configured to determine a second part, comprising the first bypass bins and the second bypass bins associated with said one or more TUs; and a third interface circuit configured to provide the first part and the second part associated with said one or more TUs for binary arithmetic coding, wherein the first part is processed by regular coding and the second part is processed by bypass coding. ### Claim 20 (depends on 19) The device of claim 19, wherein two or more of the first circuit, the second circuit, the third circuit, the fourth circuit, the first interface circuit, the second interface circuit, and the third interface circuit are implemented by an integrated circuit. ### Claim 21 A device for context-based adaptive binary arithmetic decoding for syntax elements of a coding unit, wherein the coding unit is partitioned into four Pus (prediction units) in an N×N intra prediction mode, the device comprising: a first interface circuit configured to receive reordered bins comprising a first part and a second part, wherein the first part comprises regular bins associated with each of two or more Pus and the second part comprises first bypass bins or second bypass bins associated with said each of two or more Pus; a first circuit configured to determine a first codeword corresponding to a first syntax element for said each of two or more Pus, wherein the first codeword comprises the regular bins, and wherein the first syntax element corresponds to an indication of intra prediction mode selection for said each of two or more Pus; a second circuit configured to determine a second codeword corresponding to a second syntax element for said each of two or more Pus if the indication corresponds to most-probable-mode coding, wherein the second syntax element corresponds to an index for a most probable mode, and wherein the second codeword comprises the first bypass bins; a third circuit configured to determine a third codeword corresponding to a third syntax element for said each of two or more Pus if the indication corresponds to remaining-prediction-mode coding, wherein the third syntax element corresponds to a remaining prediction mode, wherein the third codeword comprises the second bypass bins; and a second interface circuit configured to provide the first syntax element, the second syntax element and the third syntax element for said each of two or more Pus. ### Claim 22 (depends on 21) The device of claim 21, wherein two or more of the first circuit, the second circuit, the third circuit, the first interface circuit, and the second interface circuit are implemented by an integrated circuit. ### Claim 23 A device for context-based adaptive binary arithmetic coding for syntax elements of a coding unit, wherein the coding unit is partitioned into four Pus (prediction units) in an N×N intra prediction mode, the device comprising: a first interface circuit configured to receive a first syntax element for each PU, wherein the first syntax element corresponds to an indication of intra prediction mode selection for said each PU; a second interface circuit configured to receive a second syntax element for said each PU if the indication corresponds to most-probable-mode coding, wherein the second syntax element corresponds to an index for a most probable mode; a third interface circuit configured to receive a third syntax element for said each PU if the indication corresponds to remaining-prediction-mode coding, wherein the third syntax element corresponds to a remaining prediction mode; a first circuit configured to determine a first codeword for the first syntax element for said each PU, wherein the first codeword comprises regular bins; a second circuit configured to determine a second codeword for the second syntax element for said each PU if the indication corresponds to the most-probable-mode coding, wherein the second codeword comprises first bypass bins; a third circuit configured to determine a third codeword for the third syntax element for said each PU if the indication corresponds to the remaining-prediction-mode coding, wherein the third codeword comprises second bypass bins; a fourth circuit configured to determine a first part, wherein the first part comprises the regular bins associated with two or more Pus; a fifth circuit configured to determine a second part, wherein the second part comprises the first bypass bins or the second bypass bins associated with each of said two or more Pus; and a fourth interface circuit configured to provide the first part and the second part for binary arithmetic coding, wherein the first part is processed by regular coding and the second part is processed by bypass coding. ### Claim 24 (depends on 23) The device of claim 23, wherein two or more of the first circuit, the second circuit, the third circuit, the fourth circuit, the fifth circuit, the first interface circuit, the second interface circuit, the third interface circuit, and the fourth interface circuit are implemented by an integrated circuit. ### Claim 25 A device for context-based adaptive binary arithmetic decoding for syntax elements of one or more blocks, the device comprising: a first circuit configured to decode reordered bins associated with said one or more blocks into regular bins and a first part, wherein the regular bins are processed by regular decoding and the first part is processed by bypass decoding; a second circuit configured to determine first bypass bins and second bypass bins from the first part associated with said one or more blocks; a third circuit configured to determine a first codeword corresponding to a first syntax element for each block, wherein the first codeword comprises the first bypass bins; a fourth circuit configured to determine a second codeword corresponding to a second syntax element corresponding for said each block, wherein the second codeword comprises the second bypass bins, wherein at least one of the first codeword and the second codeword further comprises the regular bins, and wherein the first syntax element and the second syntax element are selected from a syntax element group consisting of syntax associated with SAO parameters, ALF parameters, coding unit parameters, mode coding parameters, motion parameters, and coefficient coding; and a first interface circuit configured to provide the first syntax element and the second syntax element for said each block. ### Claim 26 (depends on 25) The device of claim 25, wherein two or more of the first circuit, the second circuit, the third circuit, the fourth circuit, and the first interface circuit are implemented by an integrated circuit. ### Claim 27 A device for context-based adaptive binary arithmetic coding for syntax elements of one or more blocks, the device comprising: a first interface circuit configured to receive a first syntax element and a second syntax element from one or more blocks, wherein the first syntax element and the second syntax element are selected from a syntax element group consisting of syntax associated with SAO parameters, ALF parameters, coding unit parameters, mode coding parameters, motion parameters, and coefficient coding; a first circuit configured to determine a first codeword corresponding to the first syntax element, wherein the first codeword comprises first bypass bins; a second circuit configured to determine a second codeword corresponding to the second syntax element, wherein the second codeword comprises second bypass bins, and wherein at least one of the first codeword and the second codeword comprises regular bins; a third circuit configured to determine a first part comprising the first bypass bins and the second bypass bins associated with said one or more blocks; and a second interface circuit configured to provide the first part associated with said one or more blocks for binary arithmetic coding, wherein the first part is processed by bypass coding. ### Claim 28 (depends on 27) The device of claim 27, wherein two or more of the first circuit, the second circuit, the third circuit, the first interface circuit, and the second interface circuit are implemented by an integrated circuit.