# US 2014/0192841 A1 · Ultra-wideband loss of signal detector at a receiver in a high speed serializer/deserializer (serdes) application

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- Number: US 2014/0192841 A1
- Document ID: US20140192841A1
- Status: Published application
- Kind: A1
- Application number: 13/775,501
- Filed: 2013-02-25
- Published: 2014-07-10
- Earliest claimed: 2013-01-09
- Assignees: LSI Corporation
- Applicants: Lsi Corporation
- Inventors: Sanyi Zhan; Tainwei Liu; Erzhu Chen
- Web page: https://patentgrep.com/patent/US20140192841A1

## CPC

- H04L 1/20: using signal quality detector
- G06F 11/10: Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- H04L 25/03006: {Arrangements for removing intersymbol interference}
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An apparatus comprising a first loss of signal circuit, a second loss of a signal circuit and a gate circuit. The first loss of a signal circuit may be configured to (i) receive an input signal containing a series of data and (ii) generate a first indication signal when the input signal is operating within a first frequency range. The second loss of signal circuit may be configured to (i) receive the input signal and (ii) generate a second indication signal when the input signal is operating within a second frequency range. The gate circuit may be configured to generate an output signal in response to either the first indication signal or the second indication signal being active.

## Claims

### Claim 1

An apparatus comprising:
a first loss of signal circuit configured to (i) receive an input signal containing a series of data and (ii) generate a first indication signal when said input signal is operating within a first frequency range;
a second loss of signal circuit configured to (i) receive said input signal and (ii) generate a second indication signal when said input signal is operating within a second frequency range; and
a gate circuit configured to generate an output signal in response to either said first indication signal or said second indication signal being active.

### Claim 2 (depends on 1)

The apparatus according to claim 1, wherein said first frequency range is different than said second frequency range.

### Claim 3 (depends on 1)

The apparatus according to claim 1, wherein said apparatus further comprises a plurality of loss signal circuits each configured to (i) receive said input signal and (ii) generate a plurality of indication signals, wherein said input signal is operating within one of a plurality of predetermined frequency ranges.

### Claim 4 (depends on 1)

The apparatus according to claim 1, wherein said first loss circuit includes an RC network.

### Claim 5 (depends on 4)

The apparatus according to claim 4, wherein said first frequency range is calibrated based on values of said RC network.

### Claim 6 (depends on 1)

The apparatus according to claim 1, wherein said apparatus minimizes power consumption.

### Claim 7 (depends on 1)

The apparatus according to claim 1, wherein said apparatus is implemented on an integrated circuit.

### Claim 8 (depends on 1)

The apparatus according to claim 1, wherein said apparatus is implemented in a serial/deserial circuit.

### Claim 9 (depends on 1)

The apparatus according to claim 1, wherein said first and second loss of signal detection circuits generate said first indication signal and said second indication signal by converting said input signal to a DC voltage, then comparing said DC voltage to a reference voltage.

### Claim 10 (depends on 9)

The apparatus according to claim 9, wherein said reference voltage is calibrated for a target frequency range.

### Claim 11

A method for detecting a wideband signal, comprising the steps of:
(A) receiving an input signal containing a series of data;
(B) generating a first indication signal when said input signal is operating within a first frequency range;
(C) generating a second indication signal when said input signal is operating within a second frequency range; and
(D) generating an output signal in response to either said first indication signal or said second indication signal being active.

### Claim 12 (depends on 11)

The method according to claim 11, wherein said first frequency range is different than said second frequency range.

### Claim 13 (depends on 11)

The method according to claim 11, wherein said method further comprises a plurality of loss signal circuits each configured to (i) receive said input signal and (ii) generate a plurality of indication signals, wherein said input signal is operating within one of a plurality of predetermined frequency ranges.

### Claim 14 (depends on 11)

The method according to claim 11, wherein step (BA) includes an RC network.

### Claim 15 (depends on 14)

The method according to claim 14, wherein said first frequency range is calibrated based on values of said RC network.

### Claim 16 (depends on 11)

The method according to claim 11, wherein said method minimizes power consumption.

### Claim 17 (depends on 11)

The method according to claim 11, wherein said method is implemented on an integrated circuit.

### Claim 18

An apparatus comprising:
means for (i) receiving an input signal containing a series of data and (ii) generating a first indication signal when said input signal is operating within a first frequency range;
means for (i) receiving said input signal and (ii) generating a second indication signal when said input signal is operating within a second frequency range; and
means for generating an output signal in response to either said first indication signal or said second indication signal being active.
