# US 2014/0192063 A1 · Controlling embedded image data in a smart display

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- Number: US 2014/0192063 A1
- Document ID: US20140192063A1
- Status: Published application
- Kind: A1
- Application number: 14/148,841
- Filed: 2014-01-07
- Published: 2014-07-10
- Earliest claimed: 2013-01-07
- Assignees: Motorola Mobility LLC
- Applicants: Motorola Mobility LLC
- Inventors: John W. Kaehler
- Web page: https://patentgrep.com/patent/US20140192063A1

## CPC

- G06T 1/60: Memory management
- G06F 3/147: using display panels
- G06T 1/20: Processor architectures; Processor configuration, e.g. pipelining
- G09G 5/001: {Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor}
- G09G 2310/04: Partial updating of the display screen
- G09G 2320/046: Dealing with screen burn-in prevention or compensation of the effects thereof
- G09G 2330/021: Power management, e.g. power saving
- G09G 2330/027: Arrangements or methods related to powering off a display
- G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A method and apparatus for controlling embedded raw image data within a display having internal memory. The method includes sending a frame of code and a final compilation of raw image data to the internal memory of the display from a primary host processor prior to the primary host processor entering a sleep state. When the primary host processor has entered a sleep state, control of the raw image data is redirected to at least one secondary host processor. The secondary host processor reads the frame of code within the internal memory of the display and instructs the display to perform an image-related behavior output that may include updating the display itself based on the frame of code found in the internal memory of the display.

## Claims

### Claim 1

A method for controlling embedded raw image data in an internal memory of a display, comprising:
sending from a primary host processor a frame of code and a final compilation of the raw image data to the internal memory of the display prior to the primary host processor going into a sleep state;
instructing the primary host processor to enter the sleep state;
redirecting control of the raw image data to at least one secondary host processor;
reading the frame of code, via the at least one secondary host processor, located within the internal memory of the display; and
instructing the display, via the at least one secondary host processor, to perform an image-related behavior output comprising updating the display according to the frame of code found in the internal memory of the display.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the primary host processor remains free to perform additional functions unrelated to the updating of the display while awake, such that the display operated by the at least one secondary host processor.

### Claim 3 (depends on 1)

The method according to claim 1 further comprising storing additional frames of code in the at least one secondary host processor.

### Claim 4 (depends on 1)

The method according to claim 1 further comprising periodically revealing a partial updated display.

### Claim 5 (depends on 1)

The method according to claim 1 further comprising:
enabling bidirectional communication of the raw image data via a switch coupled to the at least one secondary host processor and the display; and
disabling communication of the raw image data via the switch coupled to the primary host processor and the display.

### Claim 6 (depends on 1)

The method according to claim 1 further comprising:
periodically, revealing one or more icons on a predetermined portion of the display.

### Claim 7 (depends on 6)

The method according to claim 6 further comprising:
periodically, revealing a subset of icons on a predetermined portion of the display.

### Claim 8 (depends on 1)

The method according to claim 1 further comprising:
storing additional frames of code within the at least one secondary host processor.

### Claim 9 (depends on 1)

The method according to claim 1 wherein the frame of code comprises programmed gamma curves of the display.

### Claim 10 (depends on 1)

The method according to claim 1 wherein the programmed gamma curves of the display correspond to at least one of an OLED-type display or an LCD-type display.

### Claim 11

A display configured for an electronic device, comprising:
an internal memory;
a primary host processor programmed to send a frame of code and a final compilation of the raw image data to the internal memory of the display prior to the primary host processor going into a sleep state; and
at least one secondary host processor configured to read the frame of code and instruct the display to perform an image-related behavior output comprising updating the display according to the frame of code found in the internal memory of the display.

### Claim 12 (depends on 11)

The display according to claim 11, wherein additional frames of code are stored in the at least one secondary host processor.

### Claim 13 (depends on 11)

The display according to claim 11, wherein the frame of code is independent of an operating system configured for the electronic device.

### Claim 14 (depends on 11)

The display according to claim 11 further comprising a switch for enabling decoupling of the primary host processor and configured to enable bidirectional coupling of the at least one secondary host processor with the display.

### Claim 15 (depends on 11)

The display according to claim 11, wherein the switch is at least one of a single low power switch or a group of multiple high power switches.

### Claim 16 (depends on 11)

The display according to claim 11, wherein a partial section of the display is configured to periodically reveal a subset of icons.

### Claim 17 (depends on 11)

The display according to claim 11, wherein the display is at least one of an OLED-type display or an LCD-type display.

### Claim 18 (depends on 17)

The display according to claim 17, wherein the frame of code includes programmed gamma curves for either an OLED display or an LCD display.
