# US 2014/0191937 A1 · Thin film transistor threshold voltage offset compensation circuit, goa circuit, and display > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191937 A1 - Document ID: US20140191937A1 - Status: Published application - Kind: A1 - Application number: 14/127,849 - Filed: 2012-11-08 - Published: 2014-07-10 - Earliest claimed: 2012-03-31 - Assignees: Boe Technology Group Co., Ltd. - Applicants: Boe Technology Group Co., Ltd. - Inventors: Chao Xu; Chunfang Zhang - Web page: https://patentgrep.com/patent/US20140191937A1 ## CPC - H03K 17/302: {in field-effect transistor switches} - G09G 3/3648: {using an active matrix (G09G3/367 - G09G3/3696 take precedence)} - G09G 3/3674: {Details of drivers for scan electrodes} - G09G 3/3677: {suitable for active matrices only} - G09G 2300/043: Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver - G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit - G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements - G11C 19/28: using semiconductor elements (G11C19/14, G11C19/36 take precedence) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract An output thin film transistor threshold voltage offset compensation circuit, a GOA circuit, and a display. The circuit includes: a first capacitor, comprising a first electrode and a second electrode, the first electrode being connected to the gate of an output thin film transistor and receiving a charge signal, the second electrode being connected to the drain of the output thin film transistor, the first capacitor being used for, under the action of the charge signal, making the first electrode and the second electrode have a same voltage, so that a voltage difference between the drain and the source of the output thin film transistor is equal to a threshold voltage thereof; a first switch unit, connected to the drain and the source of the output thin film transistor, and opening under the action of a first clock signal, so that a voltage difference between the gate and the source of the output thin film transistor is equal to the threshold voltage thereof. ## Claims ### Claim at position 1 1-13. (canceled) ### Claim 14 A compensation circuit for a threshold voltage drift of an output thin film transistor, including a first capacitor, a first switching unit, a charging signal, a first clock signal; wherein: the first capacitor includes a first electrode and a second electrode, the first electrode is connected to a gate of the output thin film transistor and receives the charging signal, the second electrode is connected to a drain of the output thin film transistor; and the first capacitor is used for ensuring the first electrode and the second electrode to have a same voltage under the control of the charging signal, such that a voltage difference between the drain and a source of the output thin film transistor is equal to the threshold voltage of the output thin film transistor; the first switching unit is connected to the drain and the source of the output thin film transistor respectively, and is turned on under the control of the first clock signal, such that the voltage difference between the gate and the source of the output thin film transistor is equal to the threshold voltage of the output thin film transistor; wherein the capacitance of the first capacitor is greater than the capacitance of the output thin film transistor and the capacitance of the first switching unit by a set value. ### Claim 15 (depends on 14) The compensation circuit of claim 14, wherein the first switching unit is a thin film transistor, and has a drain connected to the drain of the output thin film transistor, a source connected to the source of the output thin film transistor, and a gate for receiving the first clock signal. ### Claim 16 (depends on 14) The compensation circuit of claim 14, wherein the compensation circuit further includes a second switching unit and a second clock signal; wherein the second switching unit is connected to the first electrode and is turned on for providing a charging signal to the first electrode under the control of the second clock signal. ### Claim 17 (depends on 16) The compensation circuit of claim 16, wherein the second switching unit is a thin film transistor, and has a drain for receiving a set drain voltage, a source connected to the first electrode, and a gate for receiving the second clock signal. ### Claim 18 (depends on 16) The compensation circuit of claim 16, wherein the compensation circuit further includes a third switching unit, a fourth switching unit and a third clock signal; wherein the third switching unit is connected to the gate of the output thin film transistor and is turned on under the control of the third clock signal; and the fourth switching unit is connected to the source of the output thin film transistor, is turned on under the control of the third clock signal and used as an output terminal of the compensation circuit to output an output signal. ### Claim 19 (depends on 18) The compensation circuit of claim 18, wherein the third switching unit is a thin film transistor, and has a drain for receiving a set drain voltage, a source connected to the gate of the output thin film transistor, and a gate for receiving the third clock signal. ### Claim 20 (depends on 18) The compensation circuit of claim 18, wherein the fourth switching unit is a thin film transistor, and has a drain connected to the source of the output thin film transistor, a source for outputting the output signal, and a gate for receiving the third clock signal. ### Claim 21 (depends on 16) The compensation circuit of claim 16, wherein the compensation circuit further includes a third switching unit, a fourth switching unit, a second capacitor, a fifth switching unit, a third clock signal and a fourth clock signal; wherein the third switching unit is connected to the gate of the output thin film transistor and is turned on under the control of the third clock signal; and the fourth switching unit is connected to the source of the output thin film transistor and the second capacitor respectively, and is turned on under the control of the third clock signal; the second capacitor includes a third electrode and a fourth electrode, the third electrode is connected to the fourth switching unit and the fifth switching unit, and the fourth electrode is grounded; the fifth switching unit is connected to the third electrode, is turned on under the control of the fourth clock signal and used as an output terminal of the compensation circuit to output an output signal. ### Claim 22 (depends on 21) The compensation circuit of claim 21, wherein the third switching unit is a thin film transistor, and has a drain for receiving a set drain voltage, a source connected to the gate of the output thin film transistor, and a gate for receiving the third clock signal. ### Claim 23 (depends on 21) The compensation circuit of claim 21, wherein the fourth switching unit is a thin film transistor, and has a drain connected to the source of the output thin film transistor, a source connected to the third electrode, and a gate for receiving the third clock signal. ### Claim 24 (depends on 21) The compensation circuit of claim 21, wherein the fifth switching unit is a thin film transistor, and has a drain connected to the third electrode, a source for outputting the output signal, and a gate for receiving the fourth clock signal. ### Claim 25 A GOA circuit for driving a row of pixels on an array substrate including: an output thin film transistor for controlling the output terminal of the GOA circuit to output an output signal, wherein the output thin film transistor is connected to the compensation circuit for threshold voltage drift of the output thin film transistor, and the voltage difference between a gate and a source of the output thin film transistor is equal to the threshold voltage thereof under the control of the compensation circuit, wherein the compensation circuit for a threshold voltage drift of the output thin film transistor, includes a first capacitor, a first switching unit, a charging signal, a first clock signal; wherein: the first capacitor includes a first electrode and a second electrode, the first electrode is connected to a gate of the output thin film transistor and receives the charging signal, the second electrode is connected to a drain of the output thin film transistor; and the first capacitor is used for ensuring the first electrode and the second electrode to have a same voltage under the control of the charging signal, such that a voltage difference between the drain and a source of the output thin film transistor is equal to the threshold voltage of the output thin film transistor; the first switching unit is connected to the drain and the source of the output thin film transistor respectively, and is turned on under the control of the first clock signal, such that the voltage difference between the gate and the source of the output thin film transistor is equal to the threshold voltage of the output thin film transistor; wherein the capacitance of the first capacitor is greater than the capacitance of the output thin film transistor and the capacitance of the first switching unit by a set value. ### Claim 26 (depends on 25) The GOA circuit of claim 25, wherein the first switching unit is a thin film transistor, and has a drain connected to the drain of the output thin film transistor, a source connected to the source of the output thin film transistor, and a gate for receiving the first clock signal. ### Claim 27 (depends on 25) The GOA circuit of claim 25, wherein the compensation circuit further includes a second switching unit and a second clock signal; wherein the second switching unit is connected to the first electrode and is turned on for providing a charging signal to the first electrode under the control of the second clock signal. ### Claim 28 (depends on 27) The GOA circuit of claim 27, wherein the second switching unit is a thin film transistor, and has a drain for receiving a set drain voltage, a source connected to the first electrode, and a gate for receiving the second clock signal. ### Claim 29 (depends on 27) The GOA circuit of claim 27, wherein the compensation circuit further includes a third switching unit, a fourth switching unit and a third clock signal; wherein the third switching unit is connected to the gate of the output thin film transistor and is turned on under the control of the third clock signal; and the fourth switching unit is connected to the source of the output thin film transistor, is turned on under the control of the third clock signal and used as an output terminal of the compensation circuit to output an output signal. ### Claim 30 A display including the GOA circuit for driving a row of pixels on an array substrate, wherein, the GOA circuit for driving a row of pixels on an array substrate including: an output thin film transistor for controlling the output terminal of the GOA circuit to output an output signal, wherein the output thin film transistor is connected to the compensation circuit for threshold voltage drift of the output thin film transistor, and the voltage difference between a gate and a source of the output thin film transistor is equal to the threshold voltage thereof under the control of the compensation circuit, wherein the compensation circuit for a threshold voltage drift of the output thin film transistor, includes a first capacitor, a first switching unit, a charging signal, a first clock signal; wherein: the first capacitor includes a first electrode and a second electrode, the first electrode is connected to a gate of the output thin film transistor and receives the charging signal, the second electrode is connected to a drain of the output thin film transistor; and the first capacitor is used for ensuring the first electrode and the second electrode to have a same voltage under the control of the charging signal, such that a voltage difference between the drain and a source of the output thin film transistor is equal to the threshold voltage of the output thin film transistor; the first switching unit is connected to the drain and the source of the output thin film transistor respectively, and is turned on under the control of the first clock signal, such that the voltage difference between the gate and the source of the output thin film transistor is equal to the threshold voltage of the output thin film transistor; wherein the capacitance of the first capacitor is greater than the capacitance of the output thin film transistor and the capacitance of the first switching unit by a set value. ### Claim 31 (depends on 30) The display claim 30, wherein the first switching unit is a thin film transistor, and has a drain connected to the drain of the output thin film transistor, a source connected to the source of the output thin film transistor, and a gate for receiving the first clock signal. ### Claim 32 (depends on 30) The display claim 30, wherein the compensation circuit further includes a second switching unit and a second clock signal; wherein the second switching unit is connected to the first electrode and is turned on for providing a charging signal to the first electrode under the control of the second clock signal. ### Claim 33 (depends on 32) The display claim 32, wherein the second switching unit is a thin film transistor, and has a drain for receiving a set drain voltage, a source connected to the first electrode, and a gate for receiving the second clock signal.