# US 2014/0191815 A1 · Integrated circuit with calibrated pulling effect correction > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191815 A1 - Document ID: US20140191815A1 - Status: Published application - Kind: A1 - Application number: 13/802,408 - Filed: 2013-03-13 - Published: 2014-07-10 - Earliest claimed: 2013-01-09 - Assignees: Broadcom Corporation - Applicants: Broadcom Corporation - Inventors: Ahmad MIRZAEI; Hooman DARABI - Web page: https://patentgrep.com/patent/US20140191815A1 ## CPC - H03L 7/099: concerning mainly the controlled oscillator of the loop - H03L 7/06: using a reference signal applied to a frequency- or phase-locked loop - H03L 7/085: concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal (H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00) - H03L 7/101: {using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop (H03L7/113, H03L7/187 take precedence)} - H03L 7/18: using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) - H03L 2207/14: Preventing false-lock or pseudo-lock of the PLL - H04B 1/0475: {with means for limiting noise, interference or distortion (H04B1/0483 takes precedence)} - H04B 1/525: with means for reducing leakage of transmitter signal into the receiver - H04B 2001/0491: {with frequency synthesizers, frequency converters or modulators} - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) - H04B: TRANSMISSION ## Abstract A frequency-control circuit includes a phase frequency detector configured to receive a reference frequency signal and generate an output detection signal. The phase frequency detector can be configured to detect a difference in phase and frequency between the reference frequency signal and a feedback of the output frequency signal. The frequency-control circuit also includes a frequency divider that is configured to apply a correction voltage to a feedback of the output frequency signal, the correction voltage being a function of a pulling signal having one or more unwanted frequency components. The frequency-control circuit also includes a loop filter configured to filter the output detection signal including the correction voltage and generate a control voltage signal. The frequency-control circuit also includes a voltage-controlled oscillator configured to receive the control voltage signal and generate an output frequency signal. ## Claims ### Claim 1 A frequency-control circuit for reducing interference from a pulling signal having one or more unwanted frequency components, the frequency-control circuit comprising: a phase frequency detector (PFD) configured to receive a reference frequency signal and generate an output detection signal; a loop filter coupled to the output of the PFD, the loop filter configured to filter the output detection signal and generate a control voltage signal; a voltage-controlled oscillator (VCO) coupled to an output of the loop filter, the VCO configured to receive the control voltage signal and generate an output frequency signal; and a frequency divider coupled to an output of the VCO and an input of the PFD, the frequency divider configured to receive a baseband signal that is a function of the pulling signal and output a correction voltage that corrects for the one or more unwanted frequency components of the pulling signal, wherein the PFD is configured to detect a difference in phase and frequency between the reference frequency signal and a feedback of the output frequency signal including the correction voltage, wherein the output frequency signal from the VCO has a reduced number of the one or more unwanted frequency components of the pulling signal. ### Claim 2 (depends on 1) The frequency-control circuit of claim 1, further comprising: a processor configured to receive a calibration signal based on the output frequency signal and generate one or more components of a baseband signal, wherein the processor is further configured to compute one or more components of the baseband signal that correspond to the one or more unwanted frequency components, wherein the frequency divider generates the correction voltage based on the baseband signal. ### Claim 3 (depends on 1) The frequency-control circuit of claim 1, wherein the frequency divider is a sigma-delta modulator configured to adjust the feedback of the output frequency signal by a fractional divide ratio of N/N+1 times the reference frequency signal, where N is a positive integer. ### Claim 4 (depends on 1) The frequency-control circuit of claim 1, wherein the frequency divider is configured to increase the feedback of the output frequency signal by N times the reference frequency signal, where N is a positive integer. ### Claim 5 (depends on 1) The frequency-control circuit of claim 1, wherein the correction voltage comprises phase and magnitude components associated with the one or more unwanted frequency components. ### Claim 6 (depends on 5) The frequency-control circuit of claim 5, wherein the pulling signal comprises second-order frequency components of a transmitted baseband signal. ### Claim 7 (depends on 6) The frequency-control circuit of claim 6, wherein the second-order frequency components of the transmitted baseband signal are greater than a threshold magnitude. ### Claim 8 (depends on 1) The frequency-control circuit of claim 1, wherein the pulling signal is generated by another frequency-control circuit. ### Claim 9 (depends on 1) The frequency-control circuit of claim 1, further comprising a frequency divider inserted in a feedback loop from the VCO to the PFD and configured to increase the feedback of the output frequency signal by N times the reference frequency signal, where N is a positive integer. ### Claim 10 (depends on 1) The frequency-control circuit of claim 1, further comprising a sigma-delta modulator inserted in a feedback loop from the VCO to the PFD and configured to increase the feedback of the output frequency signal by a fractional divide ratio of N/N+1 times the reference frequency signal, where N is a positive integer. ### Claim 11 (depends on 1) The frequency-control circuit of claim 1, wherein the frequency-control circuit is a phase-locked loop (PLL). ### Claim 12 (depends on 1) The frequency-control circuit of claim 1, wherein the loop filter is a first-order low-pass filter. ### Claim 13 (depends on 2) The frequency-control circuit of claim 2, wherein the processor is a digital signal processor. ### Claim 14 (depends on 1) The frequency-control circuit of claim 1, further comprising: calibration circuitry coupled to an output of the VCO, wherein the calibration circuitry adjusts the VCO during a calibration state to vary the output frequency signal according to the correction voltage. ### Claim 15 An apparatus for reducing interference from a pulling signal having one or more unwanted frequency components, the apparatus comprising: means for receiving a reference frequency signal and generating an output detection signal; means for filtering the output detection signal and generating a control voltage signal; means for receiving the control voltage signal and generating an output frequency signal; and means for receiving a baseband signal that is a function of the pulling signal and outputting a correction voltage that corrects for the one or more unwanted frequency components of the pulling signal, wherein the output frequency signal has a reduced number of the one or more unwanted frequency components of the pulling signal based on the correction voltage. ### Claim 16 (depends on 15) The apparatus of claim 15, wherein the means for receiving the reference frequency signal comprises means for detecting a difference in phase and frequency between the reference frequency signal and a feedback of the output frequency signal. ### Claim 17 (depends on 16) The apparatus of claim 16, further comprising: means for receiving a calibration signal based on the output frequency signal and generating the baseband signal, wherein the means for outputting the correction voltage is based on the baseband signal. ### Claim 18 (depends on 15) The apparatus of claim 15, wherein the means for outputting the correction voltage comprises means for adjusting the feedback of the output frequency signal by a fractional divide ratio of N/N+1 times the reference frequency signal, where N is a positive integer. ### Claim 19 (depends on 15) The apparatus of claim 15, wherein the means for outputting the correction voltage comprises means for adjusting the feedback of the output frequency signal by N times the reference frequency signal, where N is a positive integer.