# US 2014/0191811 A1 · Integrated circuit with calibrated pulling effect correction > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191811 A1 - Document ID: US20140191811A1 - Status: Published application - Kind: A1 - Application number: 13/802,422 - Filed: 2013-03-13 - Published: 2014-07-10 - Earliest claimed: 2013-01-09 - Assignees: Broadcom Corporation - Applicants: Broadcom Corporation - Inventors: Ahmad MIRZAEI; Hooman DARABI - Web page: https://patentgrep.com/patent/US20140191811A1 ## CPC - H03L 7/099: concerning mainly the controlled oscillator of the loop - H03L 7/06: using a reference signal applied to a frequency- or phase-locked loop - H03L 7/085: concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal (H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00) - H03L 7/101: {using an additional control signal to the controlled loop oscillator derived from a signal generated in the loop (H03L7/113, H03L7/187 take precedence)} - H03L 7/18: using a frequency divider or counter in the loop (H03L7/20, H03L7/22 take precedence) - H03L 2207/14: Preventing false-lock or pseudo-lock of the PLL - H04B 1/0475: {with means for limiting noise, interference or distortion (H04B1/0483 takes precedence)} - H04B 1/525: with means for reducing leakage of transmitter signal into the receiver - H04B 2001/0491: {with frequency synthesizers, frequency converters or modulators} - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) - H04B: TRANSMISSION ## Abstract A calibration circuit includes a combinational gate configured to receive a voltage-controlled oscillator (VCO) output signal and a selected reference signal to detect a phase difference between the VCO output signal and the selected reference signal and generate an output binary signal, in which the VCO output signal has one or more unwanted frequency components. The calibration circuit also includes a loop filter configured to filter the output binary signal and generate a filtered calibration signal. The calibration circuit also includes an analog-to-digital converter configured to convert the filtered calibration signal from the analog domain to the digital domain and generate a converted calibration signal. The calibration circuit also includes a processor configured to compute the converted calibration signal and determine components of a baseband signal that cancels the one or more unwanted frequency components of the VCO output signal. ## Claims ### Claim 1 A calibration circuit for calibrating a reduction in interference from a pulling signal having one or more unwanted frequency components, comprising: a combinational gate coupled to an output of a voltage-controlled oscillator (VCO), the combinational gate configured to receive a VCO output signal and a selected reference signal to detect a phase difference between the VCO output signal and the selected reference signal and generate an output binary signal, wherein the VCO output signal comprises the one or more unwanted frequency components of the pulling signal; a loop filter coupled to an output of the VCO, the loop filter configured to filter the output binary signal and generate a filtered calibration signal; an analog-to-digital converter coupled to an output of the loop filter, the analog-to-digital converter configured to convert the filtered calibration signal from the analog domain to the digital domain and generate a converted calibration signal; and a processor coupled to an output of the analog-to-digital converter, the processor configured to compute the converted calibration signal and determine components of a baseband signal that corrects for the one or more unwanted frequency components of the VCO output signal. ### Claim 2 (depends on 1) The calibration circuit of claim 1, further comprising: a phase-locked loop (PLL) coupled to an input of the combinational gate, the PLL configured to receive a reference frequency signal and output an output oscillator signal proportionate to the reference frequency signal, wherein the selected reference signal is based on a selection between the output oscillator signal and the reference frequency signal. ### Claim 3 (depends on 2) The calibration circuit of claim 2, wherein the PLL comprises: a phase frequency detector (PFD) configured to detect a difference in phase and frequency between the reference frequency signal and output oscillator signal and generate a PFD signal; and a wideband low-pass filter coupled to an output of the PFD, the wideband low-pass filter configured to filter the PFD signal and output a filtered PFD signal. ### Claim 4 (depends on 3) The calibration circuit of claim 3, wherein the PLL comprises: a ring oscillator coupled to an output of the wideband low-pass filter, the ring oscillator configured to receive the filtered PFD signal and generate the output oscillator signal that is 1/N times the VCO output signal, where N is a positive integer, wherein the output oscillator signal is directly proportionate to the VCO output signal. ### Claim 5 (depends on 4) The calibration circuit of claim 4, further comprising: a frequency divider inserted in a feedback loop from the ring oscillator to the PFD and configured to increase the output oscillator signal by N times the reference frequency signal, where N is a positive integer. ### Claim 6 (depends on 4) The calibration circuit of claim 4, further comprising: a sigma-delta modulator inserted in a feedback loop from the ring oscillator to the PFD and configured to increase the output oscillator signal by a fractional divide ratio of N/N+1 times the reference frequency signal, where N is a positive integer. ### Claim 7 (depends on 1) The calibration circuit of claim 1, wherein the VCO output signal comprises second-order frequency components of a transmitted baseband signal. ### Claim 8 (depends on 7) The calibration circuit of claim 7, wherein the second-order frequency components of the transmitted baseband signal are greater than a magnitude threshold. ### Claim 9 (depends on 1) The calibration circuit of claim 1, wherein the calibration circuit is operable during a calibration state to generate the baseband signal that varies the VCO output signal. ### Claim 10 (depends on 1) The calibration circuit of claim 1, wherein the VCO output signal is output from a phase-locked loop (PLL). ### Claim 11 (depends on 1) The calibration circuit of claim 1, wherein the loop filter is a first-order low-pass filter. ### Claim 12 (depends on 1) The calibration circuit of claim 1, wherein the processor is a digital signal processor. ### Claim 13 An apparatus for calibrating a reduction in interference from a pulling signal having one or more unwanted frequency components, comprising: means for receiving a voltage-controlled oscillator (VCO) output signal and a selected reference signal to detect a phase difference between the VCO output signal and the selected reference signal and generating an output binary signal, wherein the VCO output signal comprises the one or more unwanted frequency components of the pulling signal; means for filtering the output binary signal and generating a filtered calibration signal; means for converting the filtered calibration signal from the analog domain to the digital domain and generating a converted calibration signal; and means for computing the converted calibration signal and determining components of a baseband signal that corrects for the one or more unwanted frequency components of the VCO output signal. ### Claim 14 (depends on 13) The apparatus of claim 13, further comprising: means for receiving a reference frequency signal and outputting an output oscillator signal proportionate to the reference frequency signal, wherein the selected reference signal is based on a selection between the output oscillator signal and the reference frequency signal. ### Claim 15 (depends on 14) The apparatus of claim 14, wherein the means for outputting the output oscillator signal comprises: means for detecting a difference in phase and frequency between the reference frequency signal and output oscillator signal and generating a PFD signal; and means for filtering the PFD signal and outputting a filtered PFD signal. ### Claim 16 (depends on 15) The apparatus of claim 15, wherein the means for outputting the output oscillator signal comprises: means for receiving the filtered PFD signal and generating the output oscillator signal that is 1/N times the VCO output signal, where N is a positive integer, wherein the output oscillator signal is directly proportionate to the VCO output signal. ### Claim 17 (depends on 16) The apparatus of claim 16, further comprising: means for adjusting the output oscillator signal by N times the reference frequency signal, where N is a positive integer. ### Claim 18 (depends on 16) The apparatus of claim 16, further comprising: means for adjusting the output oscillator signal by a fractional divide ratio of N/N+1 times the reference frequency signal, where N is a positive integer.