# US 2014/0191800 A1 · Multiple winding transformer coupled amplifier

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2014/0191800 A1
- Document ID: US20140191800A1
- Status: Published application
- Kind: A1
- Application number: 13/736,028
- Filed: 2013-01-07
- Published: 2014-07-10
- Earliest claimed: 2013-01-07
- Assignees: Analog Devices, Inc.
- Inventors: Edward Perry Jordan
- Web page: https://patentgrep.com/patent/US20140191800A1

## CPC

- H03F 1/00: Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F 1/347: {using transformers}
- H03F 3/195: in integrated circuits
- H03F 3/211: {using a combination of several amplifiers (H03F3/60 takes precedence)}
- H03F 2200/411: the output amplifying stage of an amplifier comprising two power stages
- H03F 2200/489: A coil being added in the source circuit of a common source stage, e.g. as degeneration means
- H03F 2200/537: A transformer being used as coupling element between two amplifying stages
- H03F: AMPLIFIERS

## Abstract

An integrated circuit includes a radio frequency (RF) amplifier having a trifilar transformer coupled to a gain device in two negative feedback paths. The trifilar transformer includes a first winding, a second winding and a third winding, a first dielectric core is disposed between the first winding and the second winding, and a second dielectric core is disposed between the second winding and the third winding. A first winding ratio between the first winding and the second winding combined with a second winding ratio between the second winding and the third winding affects a total gain of the RF amplifier. In a specific embodiment, the gain device is a transistor, the first winding is coupled to a base of the transistor, the second winding is coupled to a collector of the transistor, and the third winding is coupled to an emitter of the transistor.

## Claims

### Claim 1

An integrated circuit, comprising:
a radio frequency (RF) amplifier including a trifilar transformer coupled to a gain device in one or more negative feedback paths, wherein the trifilar transformer comprises a first winding, a second winding and a third winding, wherein a first dielectric core is disposed between the first winding and the second winding, and a second dielectric core is disposed between the second winding and the third winding, wherein a first winding ratio between the first winding and the second winding combined with a second winding ratio between the second winding and the third winding affects a total gain of the RF amplifier.

### Claim 2 (depends on 1)

The integrated circuit of claim 1, wherein the gain device is a transistor, and wherein the first winding is coupled to a base of the transistor, the second winding is coupled to a collector of the transistor, and the third winding is coupled to an emitter of the transistor.

### Claim 3 (depends on 1)

The integrated circuit of claim 1, wherein the first winding is further coupled to an input to the RF amplifier, the second winding is further coupled to an output of the RF amplifier and a power supply, and the third winding is further coupled to a ground.

### Claim 4 (depends on 1)

The integrated circuit of claim 1, further comprising a degeneration resistor coupled between an emitter and the third winding.

### Claim 5 (depends on 1)

The integrated circuit of claim 1, further comprising an alternating current blocking choke disposed between the first winding and a base, wherein the alternating current blocking choke facilitates providing a direct current bias to the base.

### Claim 6 (depends on 1)

The integrated circuit of claim 1, wherein the trifilar transformer is realized on the integrated chip having a plurality of layers, with the first dielectric core located on a layer that is different from the second dielectric core.

### Claim 7 (depends on 1)

The integrated circuit of claim 1, wherein the trifilar transformer is realized on the integrated chip having a plurality of layers, with the first dielectric core and the second dielectric core located on a common layer.

### Claim 8 (depends on 1)

The integrated circuit of claim 1, further comprising an additional RF amplifier including an additional trifilar transformer coupled to another gain device cascaded together for higher gain amplification, wherein the additional trifilar transformer is coupled to an output of the RF amplifier.

### Claim 9 (depends on 8)

The integrated circuit of claim 8, further comprising a matching network at an output of the additional RF amplifier to match an output impedance.

### Claim 10 (depends on 8)

The integrated circuit of claim 8, further comprising a matching network at an input to the RF amplifier to match an input impedance.

### Claim 11 (depends on 8)

The integrated circuit of claim 8, further comprising an active matching network across the trifilar transformer to match an input impedance.

### Claim 12

A system, comprising:
a motherboard;
a plurality of electronic components coupled to the motherboard; and
a radio frequency (RF) amplifier including a trifilar transformer coupled to a gain device in one or more negative feedback paths, wherein the trifilar transformer comprises:
a first winding;
a second winding; and
a third winding; wherein a first dielectric core is disposed between the first winding and the second winding, and a second dielectric core is disposed between the second winding and the third winding, wherein a first winding ratio between the first winding and the second winding combined with a second winding ratio between the second winding and the third winding affects a total gain of the RF amplifier.

### Claim 13 (depends on 12)

The system of claim 12, wherein the gain device is a transistor.

### Claim 14 (depends on 13)

The system of claim 13, wherein the first winding is coupled to a base of the transistor, the second winding is coupled to a collector of the transistor, and the third winding is coupled to an emitter of the transistor.

### Claim 15 (depends on 12)

The system of claim 12, wherein the first winding is further coupled to an input to the RF amplifier, the second winding is further coupled to an output of the RF amplifier and a power supply, and the third winding is further coupled to a ground.

### Claim 16 (depends on 12)

The system of claim 12, further comprising a degeneration resistor coupled between an emitter and the third winding.

### Claim 17 (depends on 12)

The system of claim 12, further comprising an alternating current blocking choke disposed between the first winding and a base, wherein the alternating current blocking choke facilitates providing a direct current bias to the base.

### Claim 18 (depends on 12)

The system of claim 12, wherein the trifilar transformer is realized on the integrated chip having a plurality of layers, with the first dielectric core located on a layer that is different from the second dielectric core.

### Claim 19 (depends on 12)

The system of claim 12, wherein the trifilar transformer is realized on the integrated chip having a plurality of layers, with the first dielectric core and the second dielectric core located on a common layer.

### Claim 20 (depends on 12)

The system of claim 12, further comprising an additional RF amplifier including an additional trifilar transformer coupled to another gain device cascaded together for higher gain amplification, wherein the additional trifilar transformer is coupled to an output of the RF amplifier.
