# US 2014/0191768 A1 · Method and system for measuring the resistance of a resistive structure

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- Number: US 2014/0191768 A1
- Document ID: US20140191768A1
- Status: Published application
- Kind: A1
- Application number: 13/734,581
- Filed: 2013-01-04
- Published: 2014-07-10
- Earliest claimed: 2013-01-04
- Assignees: Linear Technology Corporation
- Applicants: Linear Technology Corporation
- Inventors: Bernhard Helmut ENGL
- Web page: https://patentgrep.com/patent/US20140191768A1

## CPC

- G01R 35/005: {Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references (G01R33/0035, G01R35/002 take precedence)}
- G01R 17/105: {for measuring impedance or resistance}
- G01R 27/14: Measuring resistance by measuring current or voltage obtained from a reference source (G01R27/16, G01R27/20, G01R27/22 take precedence)
- G01R 1/203: {Resistors used for electric measuring, e.g. decade resistors standards, resistors for comparators, series resistors, shunts (resistors in general H01C; microwave or radiowave terminations H01P1/26; coupling devices H01R)}
- G01R 27/16: Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

Method and system for measuring the resistance of a resistive structure having at least three nodes. A first calibration signal is determined by measuring a voltage at an output of the resistance structure when no calibration current is injected into a third node between the first and second nodes of the structure. A calibration current is then injected into the third node and a second calibration signal is determined. The absolute value of the difference between the first calibration signal and the second calibration signal is determined, the absolute value being proportional to a product of the resistance of the resistive structure and the calibration current.

## Claims

### Claim 1

A system for measuring electrical resistance, comprising:
a resistive structure having:
a first node at a first end of the resistive structure;
a second node at a second end of the resistive structure; and
a third node on the resistive structure between the first and second nodes;
a calibration current generation circuit having an output coupled to the third node of the resistive structure; and
a signal conditioning circuit comprising:
a first input coupled to the first node of the resistive structure;
a second input coupled to the second node of the resistive structure;
a third input coupled to the third node of the resistive structure; and
an output,
wherein the signal conditioning circuit is configured to provide at its output a signal proportional to a difference between a voltage at the third node and a weighted average of the voltages at the first and second nodes of the resistive structure.

### Claim 2 (depends on 1)

The system of claim 1, further comprising a signal processing circuit coupled to the output of the signal conditioning circuit, wherein the signal processing circuit is configured to calculate the resistance of the resistive structure.

### Claim 3 (depends on 2)

The system of claim 2, wherein the calibration current generation circuit is configured to sequentially couple at least two different calibration currents of different magnitude or sign into the third node of the resistive structure, and the signal processing circuit is configured to calculate the resistance of the resistive structure from a difference between a first output voltage of the signal conditioning circuit when the calibration current is set to a first value, and a second output voltage of the signal conditioning circuit when the calibration current is set to a second value.

### Claim 4 (depends on 3)

The system of claim 3, wherein the calibration current generation circuit comprises a current servo loop having a regulation transistor that is configured to regulate the calibration current to a value determined by a reference voltage and a reference resistor (Rs).

### Claim 5 (depends on 4)

The system of claim 4, wherein the regulation transistor of the current servo loop is configured to be switched between at least two current values.

### Claim 6 (depends on 5)

The system of claim 5, wherein the regulation transistor of the current servo loop is configured to be switched ON and OFF.

### Claim 7 (depends on 4)

The system of claim 4, wherein the signal processing circuit comprises a switched capacitor integrator and a comparator.

### Claim 8 (depends on 7)

The system of claim 7, wherein:
the switched capacitor integrator and comparator are configured as a modulator of a delta sigma analog-to-digital converter; and
the modulator is configured to use a reference voltage that tracks the reference voltage that is used to regulate the calibration current.

### Claim 9 (depends on 1)

The system of claim 1, wherein the signal conditioning circuit comprises:
an interpolator having a first input coupled to the first node of the resistive structure, a second input coupled to the second node of the resistive structure, and an output; and
a difference amplifier having a first input coupled to the output of the interpolator and a second input coupled to the third node of the resistive structure, wherein the difference amplifier is configured to amplify a difference between the third node of the resistive structure and a voltage at the output of the interpolator.

### Claim 10 (depends on 9)

The system of claim 9, wherein the interpolator is configured to provide a voltage at its output based on:
a voltage Va at the first node of the resistive structure;
a voltage Vb at the second node of the resistive structure; and
an interpolation parameter “a,” wherein,
the voltage at the output is equal or proportional to 0.5*[(1−a)*Va+(1+a)*Vb].

### Claim 11 (depends on 10)

The system of claim 10, further comprising a circuit for trimming the interpolation parameter “a” such that the voltage at the output of the interpolator is substantially the same magnitude as the voltage at the third node of the resistive structure when the calibration current is zero.

### Claim 12 (depends on 10)

The system of claim 10, further comprising a circuit configured to tune the interpolation parameter “a” such that influence of load current flowing though the resistive structure on the signal at the output of the signal conditioning circuit is minimized.

### Claim 13 (depends on 10)

The system of claim 10, further comprising a correlator circuit having a first correlator input coupled to the output of the signal conditioning circuit.

### Claim 14 (depends on 13)

The system of claim 13, wherein the correlator circuit comprises a multiplier coupled to an integrator.

### Claim 15 (depends on 13)

The system of claim 13, wherein:
the output of the signal conditioning circuit is a differential output having positive and negative polarity output nodes; and
the correlator circuit comprises a polarity interchanging switch arrangement coupled to an integrator.

### Claim 16 (depends on 13)

The system of claim 13, wherein the correlator circuit further includes a second input, wherein the second input is:
differential; and
coupled to the first and second nodes of the resistive structure.

### Claim 17 (depends on 13)

The system of claim 13, further comprising at least one tuning current source coupled to at least the first or second node of the resistive structure, wherein the at least one tuning current source is configured to provide tuning current pulses for tuning the interpolator.

### Claim 18 (depends on 17)

The system of claim 17, wherein the calibration current generation circuit comprises a servo loop having:
a regulation transistor configured to regulate the calibration current to a value determined by a reference voltage and a reference resistor;
a first current steering transistor coupled between the regulation transistor and the third node of the resistive structure; and
a second current steering transistor coupled between the regulation transistor and one of (i) the first node or (ii) the second node of the resistive structure.

### Claim 19 (depends on 17)

The system of claim 17, further comprising a plurality of switches having a common node coupled to a reference voltage and configured to render active one of (i) the first regulation transistor or (ii) the second regulation transistor, wherein:
the calibration current generation circuit comprises a servo loop having at least two regulation transistors configured to regulate the calibration or tuning current to a value determined by a reference voltage and a reference resistor (Rs);
the first regulation transistor is coupled to the third node of the resistive structure; and
the second regulation transistor is coupled to one of the (i) first or (ii) second node of the resistive structure.

### Claim 20 (depends on 9)

The system of claim 9, further comprising:
an input voltage node (Vin);
a reference resistor;
at least two current steering transistors, wherein a first current steering transistor has a source coupled to the third node of the resistive structure and a second current steering transistor has a source coupled to the first node of the resistive structure;
a control circuit having a separate output coupled to a gate of the at least two current steering transistors, respectively;
wherein:
the first node of the reference resistor is coupled to the input voltage node;
the second node of the reference resistor is coupled to the third node of the resistive structure via the first current steering transistor;
the input node is coupled to the first node of the resistive structure via the second current steering transistor; and
the control circuit is configured to independently switch the current steering transistors ON and OFF.

### Claim 21 (depends on 20)

The system of claim 20, further comprising a secondary calibration current source coupled to the reference resistor.

### Claim 22 (depends on 9)

The system of claim 9, wherein the calibration current generation circuit comprises a resonant tank circuit that is coupled between the third node of the resistive structure and to either the first or second node of the resistive structure.

### Claim 23

A method of measuring resistance of a resistive structure having a first node at a first end of the resistive structure, a second node at a second end of the resistive structure, and a third node between the first node and the second node of the resistive structure and adapted to receive a calibration current; a signal conditioning circuit comprising a first input coupled to the first node of the resistive structure, a second input coupled to the second node of the resistive structure, a third input coupled to the third node of the resistive structure; and an output, the method comprising:
determining a first calibration signal by measuring a voltage at the output when no calibration current is injected into the third node of the resistive structure;
injecting a calibration current into the third node of the resistive structure;
determining a second calibration signal by:
interpolating voltages at the first and second nodes of the resistive structure; and
subtracting the interpolated voltage from a voltage at the third node of the resistive structure; and
determining an absolute value of a difference between the determined first calibration signal and the determined second calibration signal, wherein the absolute value is proportional to a product of the resistance of the resistive structure and the calibration current.

### Claim 24 (depends on 23)

The method of claim 23, wherein the calibration current is injected into the third node of the resistive structure in a form of a pulse.

### Claim 25 (depends on 23)

The method of claim 23, further comprising performing the first calibration signal and the second calibration signal periodically.

### Claim 26 (depends on 23)

The method of claim 23, further comprising measuring a current flowing between the first node and the second node of the resistive structure.

### Claim 27 (depends on 23)

The method of claim 23, wherein interpolating the voltage at the first node of the resistive structure and the voltage at the second node of the resistive structure includes determining a weighted average voltage (Vavg) between the voltages at the first node of the resistive structure and at the second node of the resistive structure based on:
a voltage Va at the first node of the resistive structure;
a voltage Vb at the second node of the resistive structure; and
an interpolation parameter “a,” wherein,
Vavg=0.5*[(1−a)*Va+(1+a)*Vb]

### Claim 28 (depends on 27)

The method of claim 27, further comprising:
amplifying a difference between the weighted average voltage (Vavg) and a voltage at the third node of the resistive structure by a factor GA; and
providing the amplified difference as an output voltage at the output (Vout).

### Claim 29 (depends on 28)

The method of claim 28, wherein the output voltage at the output (Vout) is based on:
a voltage Vc at the third node of the resistive structure, wherein,
Vout=GA*{0.5*[(1−a)*Va+(1+a)*Vb]−Vc}

### Claim 30 (depends on 27)

The method of claim 27, further comprising tuning the signal conditioning circuit to compensate for a difference between a resistance between the first and third nodes of the resistive structure and a resistance between the second and third nodes of the resistive structure.

### Claim 31 (depends on 30)

The method of claim 30, wherein the tuning comprises varying the interpolation parameter “a” until the voltage at the output is minimized when no calibration current is injected into the third node of the resistive structure.

### Claim 32 (depends on 31)

The method of claim 31, wherein the tuning further comprises using a load current ripple as a signal source, wherein the load current ripple is caused by at least one of:
(i) a switch-mode power supply coupled to the first or third node of the resistive structure; or
(ii) a load coupled to the first or third node of the resistive structure.

### Claim 33 (depends on 31)

The method of claim 31, wherein the tuning further comprises providing a current pulse to at least one of (i) the first node of the resistive structure or (ii) the second node of the resistive structure to create an artificial ripple current in the resistive structure to tune the signal conditioning circuit.

### Claim 34 (depends on 32)

The method of claim 32, wherein the switch mode power supply is modulated during the tuning process to generate a load current ripple.