# US 2014/0191680 A1 · Backlight Dimmer Circuit and Backlight Dimming Method

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- Number: US 2014/0191680 A1
- Document ID: US20140191680A1
- Status: Published application
- Kind: A1
- Application number: 13/807,722
- Filed: 2012-11-25
- Published: 2014-07-10
- Earliest claimed: 2012-11-16
- Assignees: Shenzhen China Star Optoelectronics Technology Co., Ltd.
- Applicants: Shenzhen China Star Optoelectronics Technology Co. LTD.
- Inventors: Xiang Yang
- Web page: https://patentgrep.com/patent/US20140191680A1

## CPC

- G09G 3/3406: {Control of illumination source (illumination devices structurally associated with liquid crystal cells G02F1/1336)}
- G09G 3/34: by control of light from an independent source
- G09G 3/36: using liquid crystals
- H04N 13/00: Stereoscopic video systems; Multi-view video systems; Details thereof
- H04N 13/341: using temporal multiplexing
- H05B 45/10: Controlling the intensity of the light
- G09G 3/003: {to produce spatial visual effects}
- G09G 2320/0626: for control of overall brightness
- H04N 13/356: having separate monoscopic and stereoscopic modes
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- H05B: ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL

## Abstract

The present invention relates to a backlight dimmer circuit and a backlight dimming method. The backlight dimmer circuit includes a PLL dimming module, which detects a rising edge of a 3D synchronous signal to generate multiple channels of 3D mode dimming signal in phase with the 3D synchronous signal; a phase delay module, which generates time-divided outputs of the multiple channels of 3D mode dimming signal according to a delay set value; an external dimming module, which receives an external dimming signal to generate a 2D mode dimming signal; and a trigger, which receives the 2D mode dimming signal and the multiple channels of 3D mode dimming signal and determines whether to output the 2D mode dimming signal or the multiple channels of 3D mode dimming signal according to a 2D/3D conversion signal.

## Claims

### Claim 1

A backlight dimmer circuit, comprising:
a PLL (Phase-Locked Loop) dimming module, which detects a rising edge of a 3-dimensional (3D) synchronous signal in order to generate multiple channels of 3D mode dimming signal that are in phase with the 3D synchronous signal, the PLL dimming module further determining duty ratio of 3D mode according to analog dimming DC duty;
a phase delay module, which receives the multiple channels of 3D mode dimming signal from the PLL dimming module and generates time-divided outputs of the multiple channels of 3D mode dimming signal in a channel by channel manner according to a delay set value;
an external dimming module, which receives an external dimming signal to generate a 2-dimensional (2D) mode dimming signal; and
a trigger, which receives the 2D mode dimming signal and the multiple channels of 3D mode dimming signal that is output in a time-divided and channel by channel manner and determines whether to output the 2D mode dimming signal or the multiple channels of 3D mode dimming signal that is output in a channel by channel manner according to a 2D/3D conversion signal.

### Claim 2 (depends on 1)

The backlight dimmer circuit as claimed in claim 1, wherein the PLL dimming module is an analog PLL or a digital PLL.

### Claim 3 (depends on 2)

The backlight dimmer circuit as claimed in claim 2, wherein the analog PLL generally comprises a phase reference extraction circuit, a voltage controlled oscillator, a phase comparator, and a control circuit, the analog PLL extracting the 3D synchronous signal as a phase reference signal, the voltage controlled oscillator comprising a triangular wave generation circuit, which is compared with analog dimming level to generate a square wave.

### Claim 4 (depends on 1)

The backlight dimmer circuit as claimed in claim 1, wherein the phase delay module comprises an adjustor counter, whereby when counting of the counter reaches a preset value, a transmission channel of the corresponding channel is opened.

### Claim 5 (depends on 1)

The backlight dimmer circuit as claimed in claim 1, wherein the phase delay module is connected to a capacitor and the delay value is determined by the value of the capacitor.

### Claim 6 (depends on 1)

The backlight dimmer circuit as claimed in claim 1, wherein the external dimming module comprises an operational amplifier.

### Claim 7 (depends on 1)

The backlight dimmer circuit as claimed in claim 1, wherein the 2D/3D conversion signal comprises high and low level signals.

### Claim 8 (depends on 1)

The backlight dimmer circuit as claimed in claim 1, wherein the PLL dimming module is integrated in an LED driving chip.

### Claim 9

A backlight dimmer circuit, comprising:
a PLL (Phase-Locked Loop) dimming module, which detects a rising edge of a 3-dimensional (3D) synchronous signal in order to generate multiple channels of 3D mode dimming signal that are in phase with the 3D synchronous signal, the PLL dimming module further determining duty ratio of 3D mode according to analog dimming DC duty;
a phase delay module, which receives the multiple channels of 3D mode dimming signal from the PLL dimming module and generates time-divided outputs of the multiple channels of 3D mode dimming signal in a channel by channel manner according to a delay set value;
an external dimming module, which receives an external dimming signal to generate a 2-Dimensional (2D) mode dimming signal; and
a trigger, which receives the 2D mode dimming signal and the multiple channels of 3D mode dimming signal that is output in a time-divided and channel by channel manner and determines whether to output the 2D mode dimming signal or the multiple channels of 3D mode dimming signal that is output in a channel by channel manner according to a 2D/3D conversion signal;
wherein the PLL dimming module is an analog PLL or a digital PLL;
wherein the analog PLL generally comprises a phase reference extraction circuit, a voltage controlled oscillator, a phase comparator, and a control circuit, the analog PLL extracting the 3D synchronous signal as a phase reference signal, the voltage controlled oscillator comprising a triangular wave generation circuit, which is compared with analog dimming level to generate a square wave;
wherein the phase delay module comprises an adjustor counter, whereby when counting of the counter reaches a preset value, a transmission channel of the corresponding channel is opened;
wherein the phase delay module is connected to a capacitor and the delay value is determined by the value of the capacitor;
wherein the external dimming module comprises an operational amplifier;
wherein the 2D/3D conversion signal comprises high and low level signals; and
wherein the PLL dimming module is integrated in an LED driving chip.

### Claim 10

A backlight dimming method, comprising:
(1) using a PLL dimming module to detect a rising edge of a 3-dimensional (3D) synchronous signal in order to generate multiple channels of 3D mode dimming signal that are in phase with the 3D synchronous signal, the PLL dimming module further determining duty ratio of 3D mode according to analog dimming DC duty;
(2) using a phase delay module to receive the multiple channels of 3D mode dimming signal from the PLL dimming module and generate time-divided outputs of the multiple channels of 3D mode dimming signal in a channel by channel manner according to a delay set value;
(3) using an external dimming module to receive an external dimming signal in order to generate a 2-dimensional (2D) dimming signal; and
(4) using a trigger to receive the 2D mode dimming signal and the multiple channels of 3D mode dimming signal that is output in a time-divided and channel by channel manner and determine whether to output the 2D mode dimming signal or the multiple channels of 3D mode dimming signal that is output in a time-divided and channel by channel manner according to a 2D/3D conversion signal.

### Claim 11 (depends on 10)

The backlight dimming method as claimed in claim 10, wherein the PLL dimming module is integrated in an LED driving chip.