# US 2014/0191418 A1 · Metal to metal bonding for stacked (3d) integrated circuits > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191418 A1 - Document ID: US20140191418A1 - Status: Published application - Kind: A1 - Application number: 13/736,984 - Filed: 2013-01-09 - Published: 2014-07-10 - Earliest claimed: 2013-01-09 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Tien-Jen Cheng; Mukta G. Farooq; John A. Fitzsimmons - Web page: https://patentgrep.com/patent/US20140191418A1 ## CPC - H10W 90/00: Package configurations - H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] - H10W 70/611: {for connecting multiple chips together} - H10W 70/65: Shapes or dispositions of interconnections - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 72/01335: {by plating, e.g. electroless plating or electroplating} - H10W 72/01353: {by etching} - H10W 72/019: {of bond pads} - H10W 72/01935: {by plating, e.g. electroless plating or electroplating} - H10W 72/0198: {batch processes} - H10W 72/07331: {Connecting techniques} - H10W 72/921: {Structures or relative sizes of bond pads} - H10W 72/923: {Bond pads having multiple stacked layers} - H10W 72/931: {Shapes of bond pads} - H10W 72/934: {Cross-sectional shape, i.e. in side view} - H10W 72/9415: {relative to the surface, e.g. recessed, protruding} - H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 80/312: {characterised by the direct bonding of electrically conductive pads} - H10W 80/334: {Thermocompression bonding} - H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips} - H10W 90/722: {between stacked chips} - H10W 90/732: {between stacked chips} - H10W 90/792: {between multiple chips} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility. ## Claims ### Claim 1 A method to enable metal to metal bonding comprising: plating a metal surface to form a bonding layer wherein an average grain size of said bonding layer is smaller than an average grain size of said metal surface. ### Claim 2 (depends on 1) The method of claim 1 wherein said bonding layer is formed by electroless plating. ### Claim 3 (depends on 2) The method of claim 2 further comprising prior to said plating: oxidizing said metal surface by exposure to H2O2, TEAH or TMAH. ### Claim 4 (depends on 2) The method of claim 2 further comprising prior to said plating: forming a discontinuous seed layer. ### Claim 5 (depends on 4) The method of claim 4 wherein said discontinuous seed layer is formed by exposing said metal surface to a solution in which the concentration of a seed catalyst is less than the concentration of a poison species. ### Claim 6 (depends on 5) The method of claim 5 said seed catalyst is selected from palladium or thallium and said poison species is an ionic species of, or a compound comprising, arsenic, cobalt, manganese, chromium, lead, nickel, silver, or combinations thereof. ### Claim 7 (depends on 5) The method of claim 5 wherein said concentration of a poison species is between 50 ppm and 500 ppm. ### Claim 8 (depends on 2) The method of claim 2 wherein said electroless plating utilizes a plating solution that contains a one or more species selected from the group consisting of acetone, ammonium peroxydisulfate, cerium ammonium nitrate (CAN), 2-mercapto-5-benzimidazolesulfonic acid (MBIS), and bis-(3-sulfopropyl)-disulfide (SPS). ### Claim 9 (depends on 2) The method of claim 2 wherein said electroless plating utilizes a plating solution that contains a reducing agent inhibitor at a concentration between 100 to 1000 ppm. ### Claim 10 (depends on 9) The method of claim 9 wherein said reducing agent inhibitor is arsenic. ### Claim 11 (depends on 2) The method of claim 2 wherein said electroless plating utilizes a plating solution that contains cobalt at a concentration between 1000 ppm and 10000 ppm. ### Claim 12 (depends on 2) The method of claim 2 wherein said electroless plating utilizes a plating solution that contains a contaminant that inhibits grain growth within said bonding layer. ### Claim 13 (depends on 12) The method of claim 12 wherein said contaminant is selected from tin or silver. ### Claim 14 A method to form a metallic bond between a first metal structure and a second metal structure comprising: holding said first metal structure and said second metal structure together at less than 350 C to form said metallic bond at an interface, wherein said interface includes a poison species at a concentration at least one order of magnitude higher than a concentration of said poison species in either of said first metal structure and said second metal structure. ### Claim 15 (depends on 14) The method of claim 14 further comprising forming a dispersed seed layer on said first metal structure. ### Claim 16 (depends on 14) The method of claim 14 wherein said interface further comprises a contaminant that inhibits grain growth. ### Claim 17 A 3D structure comprising a first die bonded to a second die, wherein the first die includes metal structure formed within a dielectric layer disposed on a semiconductor substrate within which at least one semiconductor device is formed, and the second die includes a semiconductor substrate and a metal contact pad, the 3D structure comprising: a metallic bond at an interface between said metal structure and said contact pad, the composition of said interface including a species other than oxygen that inhibits plating, the concentration of said impurity at the interface being at least one order of magnitude higher than the concentration of said species within either of said metal structure or said contact pad. ### Claim 18 (depends on 17) The structure of claim 17 wherein said species is Pb, TI, or a combination including Pb or TI. ### Claim 19 (depends on 17) The structure of claim 17 wherein the concentration of said species is at least three orders of magnitude higher than a concentration of said species in either of said metal structure or said contact pad. ### Claim 20 (depends on 17) The structure of claim 17, wherein a contaminant of the group consisting of arsenic, tin, cobalt, or silver is detectible at said interface. ### Claim 21 (depends on 1, 17) The structure of claim 17 formed by the method of claim 1. ### Claim 22 (depends on 14, 17) The structure of claim 17 formed by the method of claim 14.