# US 2014/0191404 A1 · Local interconnect structure and fabrication method

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- Number: US 2014/0191404 A1
- Document ID: US20140191404A1
- Status: Published application
- Kind: A1
- Application number: 14/141,035
- Filed: 2013-12-26
- Published: 2014-07-10
- Earliest claimed: 2013-01-10
- Assignees: Semiconductor Manufacturing International (Shanghai) Corporation
- Applicants: Semiconductor Manufacturing International (Shanghai) Corporation
- Inventors: DONGJIANG WANG; DANNY HUANG; STEVEN ZHANG
- Web page: https://patentgrep.com/patent/US20140191404A1

## CPC

- H10W 70/65: Shapes or dispositions of interconnections
- H10W 20/0698: {Local interconnections}
- H10W 20/089: {using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning}
- H10W 70/611: {for connecting multiple chips together}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Local interconnect structures and fabrication methods are provided. A dielectric layer can be formed on a semiconductor substrate. A first film layer can be patterned on the dielectric layer to define a region surrounded by a local interconnect structure to be formed. A sidewall spacer can be formed and patterned surrounding the first film layer on an exposed surface portion of the dielectric layer. A second film layer can be formed on the exposed surface portion of the dielectric layer and can have a top surface substantially flushed with a top surface of the sidewall spacer. The patterned sidewall spacer can be removed to form a first opening. After forming the first opening, the dielectric layer can be etched to form a second opening through the dielectric layer. The second opening can be filled with a conductive material to form the local interconnect structure.

## Claims

### Claim 1

A method of making a local interconnect structure, comprising:
providing a semiconductor substrate;
forming a dielectric layer on the semiconductor substrate;
forming a first film layer patterned on the dielectric layer to define a region surrounded by a local interconnect structure to be formed and to expose a surface portion of the dielectric layer;
forming a sidewall spacer surrounding the first film layer and on the exposed surface portion of the dielectric layer;
patterning the sidewall spacer to define a position for forming the local interconnect structure to be formed;
forming a second film layer on exposed surface portion of the dielectric layer, wherein the second film layer has a top surface substantially flushed with a top surface of the sidewall spacer;
removing the patterned sidewall spacer to form a first opening;
after forming the first opening, etching the dielectric layer to expose a surface of the semiconductor substrate to form a second opening through the dielectric layer; and
filling the second opening with a conductive material to form the local interconnect structure.

### Claim 2 (depends on 1)

The method of claim 1, wherein, after forming the sidewall spacer and before patterning the sidewall spacer, the method further includes: removing the first film layer, and wherein, after forming the second opening and before filling the conductive material, the method further includes removing the second film layer.

### Claim 3 (depends on 1)

The method of claim 1, wherein, after forming the second opening and before filling the conductive material, the method further includes:
removing the first film layer and the second film layer.

### Claim 4 (depends on 1)

The method of claim 1, wherein forming the first film layer patterned on the dielectric layer include:
forming a material layer of the first film layer on the dielectric layer;
forming a first mask layer on the material layer of the first film layer to define the region surrounded by the local interconnect structure to be formed;
using the first mask layer as an etch mask to etch the material layer of the first film layer to form the first film layer; and
after etching the material layer of the first film layer, removing the first mask layer.

### Claim 5 (depends on 1)

The method of claim 1, wherein the local interconnect structure has a shape formed by two line-shaped segments intersected to provide an angle at an endpoint of each of the two line-shaped segments, and the region surrounded by the local interconnect structure includes a triangular, quadrangular, or polygonal shape.

### Claim 6 (depends on 1)

The method of claim 1, wherein the local interconnect structure is L-shaped, and the region surrounded by the local interconnect structure includes a quadrangular shape.

### Claim 7 (depends on 1)

The method of claim 1, wherein the local interconnect structure is arc-shaped, and the region surrounded by the local interconnect structure includes a circular or a semicircular shape.

### Claim 8 (depends on 1)

The method of claim 1, wherein forming the sidewall spacer surrounding the first film layer includes:
forming a sidewall spacer material layer on the dielectric layer and the first film layer;
etching back the sidewall spacer material layer to form the sidewall spacer; and
after forming the second film layer, removing a thickness portion of the second film layer and a thickness portion of the sidewall spacer by a chemical mechanical polishing such that the sidewall spacer has an equal width from the top surface to a bottom surface.

### Claim 9 (depends on 1)

The method of claim 1, wherein forming the sidewall spacer surrounding the first film layer includes:
forming a sidewall spacer material layer on the dielectric layer and the first film layer;
polishing the sidewall spacer material layer by a chemical mechanical polishing such that the sidewall spacer material layer has a top surface substantially flushed with a top surface of the first film layer;
after polishing, forming a second mask layer on the first film layer and on the sidewall spacer material layer to define a position for forming the sidewall spacer;
using the second mask layer as an etch mask to etch the polished sidewall spacer material layer to form the sidewall spacer; and
removing the second mask layer after etching the polished sidewall spacer material layer.

### Claim 10 (depends on 1)

The method of claim 1, wherein patterning the sidewall spacer include:
forming a third mask layer on the sidewall spacer to define the position for forming the local interconnect structure;
using the third mask layer as an etch mask to etch the sidewall spacer; and
after etching the sidewall spacer, removing the third mask layer.

### Claim 11 (depends on 1)

The method of claim 1, further including: selecting a material for each of the first film layer and the sidewall spacer such that an etching selectivity ratio of the first film layer over the sidewall spacer is about 10:1 or greater.

### Claim 12 (depends on 1)

The method of claim 1, wherein the first film layer is formed of a material including silicon oxide, silicon nitride, silicon oxynitride, silicon, amorphous carbon, or acombination thereof.

### Claim 13 (depends on 1)

The method of claim 1, wherein the first film layer includes a photoresist material.

### Claim 14 (depends on 1)

The method of claim 1, wherein the sidewall spacer is made of a material including silicon oxide, silicon nitride, silicon oxynitride, boron nitride, tantalum nitride, hafnium nitride, polycrystalline silicon, amorphous carbon, or a combination thereof.

### Claim 15 (depends on 1)

The method of claim 1, further including: selecting a material for each of the sidewall spacer and the second film layer such that an etching selectivity ratio of the sidewall spacer over the second film layer is about 5:1 or greater.

### Claim 16 (depends on 1)

The method of claim 1, wherein the second film layer is made of a material including, an amorphous carbon, a photoresist, an organic dielectric coating (ODL), a bottom anti-reflective coating (BARC), an organic planarizing layer (OPL), a near frictionless carbon coating (NFC), silicon nitride, silicon oxide, silicon oxynitride, or a combination thereof.

### Claim 17 (depends on 1)

The method of claim 1, wherein forming the second film layer includes:
depositing a second film layer material on the semiconductor substrate; and
removing a portion of the second film layer material that is over a top surface of the sidewall spacer after patterning to form the second film layer.

### Claim 18 (depends on 1)

The method of claim 1, wherein the conductive material includes aluminum, copper, tungsten, or a combination thereof.

### Claim 19

A local interconnect structure, comprising:
a dielectric layer disposed on a semiconductor substrate;
a first film layer disposed on the dielectric layer to define a region surrounded by a local interconnect structure and to expose a surface portion of the dielectric layer;
a sidewall spacer surrounding the first film layer and on the exposed surface portion of the dielectric layer, wherein the sidewall spacer is patterned to define a position for the local interconnect structure;
a second film layer disposed on the exposed surface portion of the dielectric layer and having a top surface substantially flushed with a top surface of the sidewall spacer; and
the local interconnect structure formed by: removing the patterned sidewall spacer to form a first opening; after forming the first opening, etching the dielectric layer to expose a surface of the semiconductor substrate to form a second opening through the dielectric layer; and filling the second opening with a conductive material to form the local interconnect structure.

### Claim 20 (depends on 19)

The device of claim 19, wherein the local interconnect structure is L-shaped, and the region surrounded by the local interconnect structure includes a quadrangular shape.