# US 2014/0191400 A1 · Semiconductor Devices and Methods of Manufacture Thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191400 A1 - Document ID: US20140191400A1 - Status: Published application - Kind: A1 - Application number: 13/734,892 - Filed: 2013-01-04 - Published: 2014-07-10 - Earliest claimed: 2013-01-04 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Inventors: Ying-Hsueh Chang Chien; Yu-Ming Lee; Man-Kit Leung; Chi-Ming Yang - Web page: https://patentgrep.com/patent/US20140191400A1 ## CPC - H10W 20/42: Vias, e.g. via plugs - H10W 20/032: {of conductive barrier, adhesion or liner layers} - H10W 20/034: {bottomless barrier, adhesion or liner layers} - H10W 20/055: {by formation methods other than physical vapour deposition [PVD], chemical vapour deposition [CVD] or liquid deposition} - H10W 20/081: {by forming openings in the dielectric parts} - H10W 20/096: {by contacting with gases, liquids or plasmas} - H10W 20/425: {Barrier, adhesion or liner layers} - H10W 20/4424: {Copper alloys} - H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants - H10W 20/48: Insulating materials thereof - Y02P 80/30: Reducing waste in manufacturing processes; Calculations of released waste quantities - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS ## Abstract Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes providing a workpiece including an insulating material layer disposed thereon. The insulating material layer includes a trench formed therein. The method includes forming a barrier layer on the sidewalls of the trench using a surface modification process and a surface treatment process. ## Claims ### Claim 1 A method of manufacturing a semiconductor device, the method comprising: providing a workpiece including an insulating material layer disposed thereon, the insulating material layer including a trench formed therein; and forming a barrier layer on sidewalls of the trench using a surface modification process and a surface treatment process. ### Claim 2 (depends on 1) The method according to claim 1, wherein the trench includes damaged regions disposed on the sidewalls thereof, and wherein the surface modification process comprises converting the damaged regions from a hydrophilic material to a hydrophobic material. ### Claim 3 (depends on 1) The method according to claim 1, wherein the surface modification process is performed in-situ with a post etch residue removal (PERR) process. ### Claim 4 (depends on 1) The method according to claim 1, wherein the surface modification process is performed after a post etch residue removal (PERR) process. ### Claim 5 (depends on 1) The method according to claim 1, wherein the surface modification process is performed before a post etch residue removal (PERR) process. ### Claim 6 (depends on 1) The method according to claim 1, wherein the surface treatment process comprises introducing a surface treatment compound selected from the group consisting essentially of a hydrocarbon, a halocarbon, sulfured carbon, silicon carbon, and combinations thereof; or wherein forming the barrier layer comprises forming a material selected from the group consisting essentially of hydrocarbon, halocarbon, sulfured carbon, silicon carbon, graphite, graphene, amorphous carbon, fullerene, and combinations thereof. ### Claim 7 (depends on 1) The method according to claim 1, wherein providing the workpiece comprises providing a workpiece including a conductive material disposed beneath the insulating material layer, wherein a top surface of the conductive material is exposed in the bottom of the trench, and wherein forming the barrier layer comprises not forming the barrier layer on the top surface of the conductive material. ### Claim 8 A method of manufacturing a semiconductor device, the method comprising: forming a conductive material over a workpiece; forming an insulating material layer over the conductive material; patterning the insulating material layer to form a trench and expose a portion of a top surface of the conductive material in the bottom of the trench; and forming a barrier layer on sidewalls of the trench using a surface modification process and a surface treatment process. ### Claim 9 (depends on 8) The method according to claim 8, further comprising forming a seed layer over the insulating material layer, the barrier layer, and the top surface of the conductive material. ### Claim 10 (depends on 9) The method according to claim 9, wherein the conductive material comprises a first conductive material, and wherein the method further comprises forming a second conductive material over the seed layer. ### Claim 11 (depends on 8) The method according to claim 8, wherein the surface modification process comprises introducing a surface modification compound. ### Claim 12 (depends on 11) The method according to claim 11, wherein introducing the surface modification compound comprises introducing a hydrocarbon. ### Claim 13 (depends on 8) The method according to claim 8, wherein forming the barrier layer comprises selectively forming the barrier layer on the sidewalls of the trench. ### Claim 14 (depends on 8) The method according to claim 8, wherein patterning the insulating material layer comprises a dry etch process. ### Claim 15 (depends on 14) The method according to claim 14, wherein the dry etch process forms damaged regions on the sidewalls of the trench, and wherein forming the barrier layer comprises altering the damaged regions on the sidewalls of the trench. ### Claim 16 (depends on 8) The method according to claim 8, wherein patterning the insulating material layer comprising forming a photosensitive material over the insulating material or over a hard mask disposed over the insulating material, patterning the photosensitive material, etching the insulating material layer or the hard mask and the insulating material using the photosensitive material as an etch mask, and removing the photosensitive material, wherein removing the photosensitive material comprises forming damaged regions on the sidewalls of the trench, and wherein forming the barrier layer comprises altering the damaged regions on the sidewalls of the trench. ### Claim at position 17 17-20. (canceled) ### Claim 21 A method of manufacturing a semiconductor device, the method comprising: forming a trench in a dielectric layer, the trench including sidewalls defined by the dielectric layer and a bottom defined by an underlying conductive structure; performing a surface modification that selectively modifies the dielectric sidewalls without modifying the underlying conductive structure; and performing a surface treatment that selectively treats the modified dielectric sidewalls without treating the underlying conductive structure to form a barrier layer on the dielectric sidewalls. ### Claim 22 (depends on 21) The method of claim 21, wherein the surface modification process includes changing the dielectric sidewalls from hydrophilic to hydrophobic. ### Claim 23 (depends on 21) The method of claim 21, wherein the surface modification process includes introducing a hydrocarbon during a post etch residue removal process. ### Claim 24 (depends on 21) The method of claim 21, wherein the surface treatment process is selected from the group consisting of heating, catalyzing, electrolyzing, photo-irradiating, and combinations thereof.