# US 2014/0191376 A1 · Semiconductor package and fabrication method thereof

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- Number: US 2014/0191376 A1
- Document ID: US20140191376A1
- Status: Published application
- Kind: A1
- Application number: 13/855,221
- Filed: 2013-04-02
- Published: 2014-07-10
- Earliest claimed: 2013-01-08
- Assignees: Siliconware Precision Industries Co., Ltd.
- Applicants: Siliconware Precision Industries Co., Ltd.
- Inventors: Fu-Tang Huang; Chun-Chi Ke
- Web page: https://patentgrep.com/patent/US20140191376A1

## CPC

- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10W 72/073: {of die-attach connectors}
- H10W 72/075: {of bond wires}
- H10W 74/01: Manufacture or treatment
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 90/00: Package configurations
- H10W 99/00: Subject matter not provided for in other groups of this subclass
- H10W 42/271: {the arrangements being between stacked chips}
- H10W 70/652: Cross-sectional shapes
- H10W 70/655: Fan-out layouts
- H10W 72/07553: {changes in shapes}
- H10W 72/07554: {changes in dispositions}
- H10W 72/325: {Die-attach connectors having a filler embedded in a matrix}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/354: {comprising polymers}
- H10W 72/537: {Multiple bond wires having different shapes}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/5453: {connecting between multiple bond pads on a chip, e.g. daisy chain}
- H10W 72/547: {Dispositions of multiple bond wires}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/865: {Die-attach connectors and bond wires}
- H10W 72/879: {Bump connectors and bond wires}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/922: {Bond pads being integral with underlying chip-level interconnections}
- H10W 72/932: {Plan-view shape, i.e. in top view}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/9445: {Top-view layouts, e.g. mirror arrays}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/28: the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/753: {between laterally-adjacent chips}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor package is provided, including: a substrate; a first semiconductor element disposed on the substrate and having a first conductive pad grounded to the substrate; a conductive layer formed on the first semiconductor element and electrically connected to the substrate; a second semiconductor element disposed on the first semiconductor element through the conductive layer; and an encapsulant formed on the substrate and encapsulating the first and second semiconductor elements. Therefore, the first and second semiconductor elements are protected from electromagnetic interference (EMI) shielding with the conductive layer being connected to the grounding pad of the substrate. A fabrication method of the semiconductor package is also provided.

## Claims

### Claim 1

A semiconductor package, comprising:
a substrate;
a first semiconductor element disposed on the substrate and having a first conductive pad grounded to the substrate;
a conductive layer formed on the first semiconductor element and electrically connected to the first conductive pad;
a second semiconductor element disposed on the conductive layer; and
an encapsulant formed on the substrate and encapsulating the first and second semiconductor elements.

### Claim 2 (depends on 1)

The semiconductor package of claim 1, wherein the substrate has a grounding pad for being grounded.

### Claim 3 (depends on 1)

The semiconductor package of claim 1, wherein the first conductive pad is grounded to the substrate by bonding wires.

### Claim 4 (depends on 1)

The semiconductor package of claim 1, wherein the second semiconductor element is electrically connected to the substrate.

### Claim 5 (depends on 1)

The semiconductor package of claim 1, wherein the first semiconductor element has a redistribution layer formed on the first conductive pad, the conductive layer is disposed on the redistribution layer, and the redistribution layer electrically connects the first conductive pad to the conductive layer and is grounded to the substrate.

### Claim 6 (depends on 5)

The semiconductor package of claim 5, wherein the redistribution layer has a conductive land electrically connected to the first conductive pad, and the conductive land is grounded to the substrate by bonding wires.

### Claim 7 (depends on 1)

The semiconductor package of claim 1, wherein the first semiconductor element has a redistribution layer, and the redistribution layer has the first conductive pad.

### Claim 8 (depends on 1)

The semiconductor package of claim 1, wherein the conductive layer is made of a conductive adhesive.

### Claim 9 (depends on 1)

The semiconductor package of claim 1 further comprising an electronic element disposed on the substrate and grounded to the substrate and the first semiconductor element.

### Claim 10

A semiconductor package, comprising:
a substrate;
a first semiconductor element disposed on the substrate and having a first conductive pad and a second conductive pad connected to the first conductive pad and grounded to the substrate;
a conductive layer formed on the first semiconductor element and electrically connected to the first conductive pad;
a second semiconductor element disposed on the conductive layer; and
an encapsulant formed on the substrate and encapsulating the first and second semiconductor elements.

### Claim 11 (depends on 10)

The semiconductor package of claim 10, wherein the substrate has a grounding pad for being grounded.

### Claim 12 (depends on 10)

The semiconductor package of claim 10, wherein the second conductive pad is grounded to the substrate by bonding wires.

### Claim 13 (depends on 10)

The semiconductor package of claim 10, wherein the first conductive pad is electrically connected to the second conductive pad by bonding wires.

### Claim 14 (depends on 10)

The semiconductor package of claim 10, wherein the first semiconductor element has an internal circuit, and the first conductive pad is electrically connected to the second conductive pad through the internal circuit.

### Claim 15 (depends on 10)

The semiconductor package of claim 10, wherein the second semiconductor element is electrically connected to the substrate.

### Claim 16 (depends on 10)

The semiconductor package of claim 10, wherein the first semiconductor element has a redistribution layer, and the redistribution layer has the first and second conductive pads.

### Claim 17 (depends on 10)

The semiconductor package of claim 10, wherein the conductive layer is made of a conductive adhesive.

### Claim 18 (depends on 10)

The semiconductor package of claim 10 further comprising an electronic element disposed on the substrate and grounded to the substrate and the first semiconductor element.

### Claim 19

A fabrication method of a semiconductor package, comprising:
providing a substrate;
disposing on the substrate a first semiconductor element having a first conductive pad;
grounding the first conductive pad and the substrate;
forming on the first semiconductor element a conductive layer electrically connected to the first conductive pad;
disposing a second semiconductor element on the conductive layer; and
forming on the substrate an encapsulant encapsulating the first and second semiconductor elements.

### Claim 20 (depends on 19)

The fabrication method of claim 19, wherein the substrate has a grounding pad for being grounded.

### Claim 21 (depends on 19)

The fabrication method of claim 19, wherein the first conductive pad is grounded to the substrate by bonding wires.

### Claim 22 (depends on 19)

The fabrication method of claim 19, wherein the second semiconductor element is electrically connected to the substrate.

### Claim 23 (depends on 19)

The fabrication method of claim 19, wherein the first semiconductor element has a redistribution layer formed on the first conductive pad, the conductive layer is disposed on the redistribution layer, and the redistribution layer electrically connects the first conductive pad to the conductive layer and is grounded to the substrate.

### Claim 24 (depends on 23)

The fabrication method of claim 23, wherein the redistribution layer has a conductive land electrically connected to the first conductive pad, and the conductive land is grounded to the substrate by bonding wires.

### Claim 25 (depends on 19)

The fabrication method of claim 19, wherein the first semiconductor element has a redistribution layer, and the redistribution layer has the first conductive pad.

### Claim 26 (depends on 19)

The fabrication method of claim 19, wherein the conductive layer is made of a conductive adhesive.

### Claim 27 (depends on 19)

The fabrication method of claim 19 further comprising disposing on the substrate an electronic element grounded to the substrate and the first semiconductor element.

### Claim 28

A fabrication method of a semiconductor package, comprising:
providing a substrate;
disposing on the substrate a first semiconductor element having a first conductive pad and a second conductive pad connected to the first conductive pad;
grounding the second conductive pad and the substrate;
forming on the first semiconductor element a conductive layer electrically connected to the first conductive pad;
disposing a second semiconductor element on the conductive layer; and
forming on the substrate an encapsulant encapsulating the first and second semiconductor elements.

### Claim 29 (depends on 28)

The fabrication method of claim 28, wherein the substrate has a grounding pad for being grounded.

### Claim 30 (depends on 28)

The fabrication method of claim 28, wherein the second conductive pad is grounded to the substrate by bonding wires.

### Claim 31 (depends on 28)

The fabrication method of claim 28, wherein the first conductive pad is electrically connected to the second conductive pad by bonding wires.

### Claim 32 (depends on 28)

The fabrication method of claim 28, wherein the first semiconductor element has an internal circuit, and the first conductive pad is electrically connected to the second conductive pad through the internal circuit.

### Claim 33 (depends on 28)

The fabrication method of claim 28, wherein the second semiconductor element is electrically connected to the substrate.

### Claim 34 (depends on 28)

The fabrication method of claim 28, wherein the first semiconductor element has a redistribution layer, and the redistribution layer has the first and second conductive pads.

### Claim 35 (depends on 28)

The fabrication method of claim 28, wherein the conductive layer is made of a conductive adhesive.

### Claim 36 (depends on 28)

The fabrication method of claim 28 further comprising disposing on the substrate an electronic element grounded to the substrate and the first semiconductor element.