# US 2014/0191368 A1 · Semiconductor integrated circuit device

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- Number: US 2014/0191368 A1
- Document ID: US20140191368A1
- Status: Published application
- Kind: A1
- Application number: 14/205,022
- Filed: 2014-03-11
- Published: 2014-07-10
- Earliest claimed: 2011-09-16
- Assignees: Panasonic Corporation
- Applicants: Panasonic Corporation
- Inventors: Shiro USAMI
- Web page: https://patentgrep.com/patent/US20140191368A1

## CPC

- H10D 89/921: {characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses}
- H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00)
- H10D 8/80: PNPN diodes, e.g. Shockley diodes or break-over diodes
- H10D 89/60: Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
- H10D 89/601: {for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs}
- H10D 89/611: {using diodes as protective elements}
- H10D 89/711: {using bipolar transistors as protective elements}
- H10D 89/713: {including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices}
- H10D 89/811: {using FETs as protective elements}
- H10D 89/911: {using passive elements as protective elements}
- H10W 20/427: {Power or ground buses}
- H10W 20/43: Layouts of interconnections
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Diffusion regions having the same conductivity type are arranged on a side of a second wiring and a side of a third wiring, respectively under a first wiring connected to a signal terminal. Diffusion regions are separated in a whole part or one part of a range in a Y direction. That is, under first wiring, diffusion regions are only formed in parts opposed to diffusion regions formed under the second wiring and third wiring connected to a power supply terminal or a ground terminal, and a diffusion region is not formed in a central part in an X direction. Therefore, terminal capacity of the signal terminal can be reduced without causing ESD resistance to be reduced, in an ESD protection circuit with the signal terminal.

## Claims

### Claim 1

A semiconductor integrated circuit device having an ESD (Electro Static Discharge) protection circuit, wherein:
the ESD protection circuit comprises:
a first wiring extending in a first direction and electrically connected to a first terminal;
a second wiring and a third wiring extending in the first direction, electrically connected to a power supply terminal or a ground terminal, and disposed on both sides of the first wiring respectively;
a first diffusion region and a second diffusion region that are connected to and formed under the first wiring, having a same first conductivity type with each other, disposed between the second wiring and the third wiring, in a second direction perpendicular to the first direction, the first and second diffusion regions being at least partially separated from each other;
a third diffusion region connected to and formed under the second wiring, having a second conductivity type, and disposed so as to be opposed to the first diffusion region in the second direction; and
a fourth diffusion region connected to and formed under the third wiring, having the second conductivity type, and disposed so as to be opposed to the second diffusion region in the second direction,
the third diffusion region, the first diffusion region, the second diffusion region and the fourth diffusion region are disposed in this order in the second direction, and
the first conductivity type is different from the second conductivity type.

### Claim 2 (depends on 1)

The semiconductor integrated circuit device according to claim 1, wherein
each of the first, second, third, and fourth diffusion regions has a rectangular shape of which length in the first direction are greater than a length in the second direction.

### Claim 3 (depends on 1)

The semiconductor integrated circuit device according to claim 1, wherein
a length of each of the first and second diffusion regions in the second direction is smaller than a length of each of the third and fourth diffusion regions in the second direction.

### Claim 4 (depends on 1)

The semiconductor integrated circuit device according to claim 1, wherein
the third and fourth diffusion regions are connected to each other through a diffusion region.

### Claim 5 (depends on 1)

The semiconductor integrated circuit device according to claim 1, wherein:
in an area including the first diffusion region and the third diffusion region opposed to each other, a space between the first wiring and the second wiring is larger than a space between the first diffusion region and the third diffusion region, and
in an area including the second diffusion region and the fourth diffusion region opposed to each other, a space between the first wiring and the third wiring is larger than a space between the second diffusion region and the fourth diffusion region.

### Claim 6 (depends on 1)

The semiconductor integrated circuit device according to claim 1, wherein:
in an area including the first diffusion region and the third diffusion region opposed to each other, the third diffusion region protrudes toward the first diffusion region from the second wiring in a planar view, and
in an area including the second diffusion region and the fourth diffusion region opposed to each other, the fourth diffusion region protrudes toward the second diffusion region from the third wiring in a planar view.

### Claim 7 (depends on 1)

The semiconductor integrated circuit device according to claim 1, wherein
the second wiring and third wiring are electrically connected to the power supply terminal.

### Claim 8 (depends on 7)

The semiconductor integrated circuit device according to claim 7, wherein:
the first conductivity type is a P type, and the second conductivity type is an N type, and
the ESD protection circuit is a diode type having the first terminal as an anode and the power supply terminal as a cathode.

### Claim 9 (depends on 1)

The semiconductor integrated circuit device according to claim 1, wherein
the second wiring and third wiring are connected to the ground terminal.

### Claim 10 (depends on 9)

The semiconductor integrated circuit device according to claim 9, wherein:
the first conductivity type is an N type, and the second conductivity type is a P type, and
the ESD protection circuit is a diode type having the ground terminal as an anode and the first terminal as a cathode.

### Claim 11 (depends on 1)

The semiconductor integrated circuit device according to claim 1, wherein
the first and second diffusion regions are separated from each other.

### Claim 12 (depends on 4)

The semiconductor integrated circuit device according to claim 4, wherein
each of the first, second, third, and fourth diffusion regions has a rectangular shape of which length in the first direction are greater than a length in the second direction.

### Claim 13 (depends on 4)

The semiconductor integrated circuit device according to claim 4, wherein
a length of each of the first and second diffusion regions in the second direction is smaller than a length of each of the third and fourth diffusion regions in the second direction.

### Claim 14 (depends on 4)

The semiconductor integrated circuit device according to claim 4, wherein:
in an area including the first diffusion region and the third diffusion region opposed to each other, a space between the first wiring and the second wiring is larger than a space between the first diffusion region and the third diffusion region, and
in an area including the second diffusion region and the fourth diffusion region opposed to each other, a space between the first wiring and the third wiring is larger than a space between the second diffusion region and the fourth diffusion region.

### Claim 15 (depends on 4)

The semiconductor integrated circuit device according to claim 4, wherein:
in an area including the first diffusion region and the third diffusion region opposed to each other, the third diffusion region protrudes toward the first diffusion region from the second wiring in a planar view, and
in an area including the second diffusion region and the fourth diffusion region opposed to each other, the fourth diffusion region protrudes toward the second diffusion region from the third wiring in a planar view.

### Claim 16 (depends on 4)

The semiconductor integrated circuit device according to claim 4, wherein
the second wiring and third wiring are electrically connected to the power supply terminal.

### Claim 17 (depends on 16)

The semiconductor integrated circuit device according to claim 16, wherein:
the first conductivity type is a P type, and the second conductivity type is an N type, and
the ESD protection circuit is a diode type having the first terminal as an anode and the power supply terminal as a cathode.

### Claim 18 (depends on 4)

The semiconductor integrated circuit device according to claim 4, wherein
the third and fourth diffusion regions are connected to each other through two diffusion regions so as to surround the first and second diffusion regions.

### Claim 19 (depends on 1)

The semiconductor integrated circuit device according to claim 1, wherein:
the first and second diffusion regions are connected to the first wiring via first contacts,
the third diffusion region is connected the second wiring via second contacts, and
the fourth diffusion region is connected to the third wiring via third contacts.