# US 2014/0191362 A1 · Electroless plating of cobalt alloys for on chip inductors

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- Number: US 2014/0191362 A1
- Document ID: US20140191362A1
- Status: Published application
- Kind: A1
- Application number: 13/968,107
- Filed: 2013-08-15
- Published: 2014-07-10
- Earliest claimed: 2013-01-10
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: William J. Gallagher; Eugene J. O'Sullivan; Naigang Wang
- Web page: https://patentgrep.com/patent/US20140191362A1

## CPC

- H10N 50/80: Constructional details
- C23C 18/1605: {by masking}
- C23C 18/1608: {from pretreatment step, i.e. selective pre-treatment}
- C23C 18/50: with alloys based on iron, cobalt or nickel
- C25D 5/022: {using masking means}
- C25D 7/001: {Magnets}
- H10D 1/20: Inductors
- H10N 50/01: Manufacture or treatment
- H10W 20/497: {Inductive arrangements or effects of, or between, wiring layers}
- H10D 64/011: {of electrodes ohmically coupled to a semiconductor}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- C25D: PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method for forming an on-chip magnetic structure includes forming a seed layer over a substrate of a semiconductor chip. The seed layer is patterned to provide a plating location. A cobalt based alloy is electrolessly plated at the plating location to form an inductive structure on the semiconductor chip.

## Claims

### Claim 1

An on-chip magnetic structure, comprising:
a patterned seed layer formed over a substrate of a semiconductor chip to provide a plating location; and
a magnetic structure including an electrolessly plated cobalt based alloy formed at the plating location, the inductive structure including at least one of a yoke and a coil.

### Claim 2 (depends on 1)

The structure as recited in claim 1, wherein the electrolessly plated cobalt based alloy includes:
a first yoke formed on the seed layer by electroless plating;
a dielectric material on the first yoke; and
a second yoke formed on an exposed portion of the first yoke through at least one opening in the dielectric material.

### Claim 3 (depends on 1)

The structure as recited in claim 1, wherein the electrolessly plated cobalt based alloy forms a shield for a slab inductor.

### Claim 4 (depends on 1)

The structure as recited in claim 1, wherein electrolessly plated cobalt based alloy includes at least one of CoWP, CoWB, CoP, CoB, CoWPB, CoMoB, and CoMoP.

### Claim 5 (depends on 1)

The structure as recited in claim 1, further comprising one of Fe and Ni introduced into the electrolessly plated cobalt based alloy to adjust magnetic properties.