# US 2014/0191350 A1 · Image sensor chip package and fabricating method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191350 A1 - Document ID: US20140191350A1 - Status: Published application - Kind: A1 - Application number: 14/150,637 - Filed: 2014-01-08 - Published: 2014-07-10 - Earliest claimed: 2013-01-10 - Assignees: Xintec Inc. - Applicants: Xintec Inc. - Inventors: Chih-Hao CHEN; Bai-Yao LOU; Shih-Kuang CHEN - Web page: https://patentgrep.com/patent/US20140191350A1 ## CPC - H10F 39/026: {Wafer-level processing} - H10F 39/024: {of coatings or optical elements} - H10F 39/028: {performed after manufacture of the image sensors, e.g. annealing, gettering of impurities, short-circuit elimination or recrystallisation} - H10F 39/804: {Containers or encapsulations} - H10F 39/8063: {Microlenses} - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An image sensor chip package is disclosed, which includes a substrate, an image sensor component formed on the substrate, a spacer formed on the substrate and surrounding the image sensor component, and a transparent plate. A stress notch is formed on a side of the transparent plate, and a breaking surface is extended from the stress notch. A method for fabricating the image sensor chip package is also disclosed. ## Claims ### Claim 1 An image sensor chip package, comprising: a substrate; an image sensor component formed on the substrate; a spacer formed on the substrate and surrounding the image sensor component; and a transparent plate disposed on the spacer, wherein the transparent plate comprises a stress notch and a breaking surface extended from the stress notch. ### Claim 2 (depends on 1) The image sensor chip package of claim 1, wherein the stress notch is a V-shaped notch, the breaking surface is extended from a vertical of the V-shape notch, and a surface roughness of the stress notch is different from a surface roughness of the breaking surface. ### Claim 3 (depends on 1) The image sensor chip package of claim 1, further comprising an optical component formed on the image sensor component. ### Claim 4 (depends on 1) The image sensor chip package of claim 1, wherein the transparent plate has an inner surface facing the substrate and an outer surface opposite to the inner surface, and the stress notch is formed on the inner surface. ### Claim 5 (depends on 4) The image sensor chip package of claim 4, further comprising a tape adhered on the outer surface of the transparent plate. ### Claim 6 (depends on 4) The image sensor chip package of claim 4, wherein a side surface of the substrate and the spacer adjacent the stress notch is a vertical surface. ### Claim 7 (depends on 4) The image sensor chip package of claim 4, further comprising: a contact area formed on the substrate and connecting to the image sensor component; a via passing through the substrate; a conductive layer formed on a sidewall of the via and an outer surface of the substrate, the conductive layer being connected to the contact area; and a pad disposed on a part of the conductive layer located at the outer surface of the substrate, such that the image sensor component is electrically connected to the pad by the contact area and the conductive layer. ### Claim 8 (depends on 7) The image sensor chip package of claim 7, further comprising a passive layer formed on the outer surface of the substrate, the passive layer having an opening for exposing the part of the conductive layer and the pad. ### Claim 9 (depends on 4) The image sensor chip package of claim 4, wherein a side surface of the substrate and the spacer adjacent the stress notch is an inclined surface, and the spacer comprises a recess for connecting the inclined surface to the stress notch. ### Claim 10 (depends on 9) The image sensor chip package of claim 9, further comprising: a contact area formed on the substrate and connecting to the image sensor component; a conductive layer formed on the recess, the inclined surface, and an outer surface of the substrate, the conductive layer being connected to the contact area; and a pad disposed on a part of the conductive layer located at the outer surface of the substrate, such that the image sensor component is electrically connected to the pad by the contact area and the conductive layer. ### Claim 11 (depends on 10) The image sensor chip package of claim 10, further comprising a passive layer formed on the outer surface of the substrate, the passive layer having an opening for exposing the part of the conductive layer and the pad. ### Claim 12 (depends on 1) The image sensor chip package of claim 1, wherein the transparent plate has an inner surface facing the substrate and an outer surface opposite to the inner surface, and the stress notch is formed on the outer surface. ### Claim 13 (depends on 12) The image sensor chip package of claim 12, wherein the substrate comprises an extended section extended over the spacer, the image sensor chip package further comprises a contact area disposed on the extended section, the contact are being connected to the image sensor component. ### Claim 14 (depends on 13) The image sensor chip package of claim 13, wherein the image sensor component and the contact area are disposed at opposite sides of the spacer. ### Claim 15 (depends on 12) The image sensor chip package of claim 12, further comprising a tape adhered on the outer surface of the substrate. ### Claim 16 A method for fabricating an image sensor chip package, comprising: providing a wafer; cutting a substrate of the wafer; forming a plurality of stress notches on a surface of a transparent plate of the wafer; and pressing the transparent plate, wherein the transparent plate is broken along the stress notches, and the wafer is divided into a plurality of image sensor chip packages. ### Claim 17 (depends on 16) The method for fabricating an image sensor chip package of claim 16, wherein the step of providing the wafer comprises: providing the substrate; forming a plurality of image sensor components on the substrate; forming a plurality of spacers on the substrate for separating the image sensor components; and disposing the transparent plate on the spacers, wherein a plurality of chambers are formed between the transparent plate and the substrate, and the image sensors are disposed in the chambers respectively. ### Claim 18 (depends on 17) The method for fabricating an image sensor chip package of claim 17, wherein the step of cutting the substrate of the wafer comprises cutting into the spacers and the transparent plate for forming the stress notches on the surface of the transparent plate. ### Claim 19 (depends on 18) The method for fabricating an image sensor chip package of claim 18, further comprising: forming a plurality of contact areas on the substrate, the contact areas connecting to the image sensor components; forming a plurality of vias passing through the substrate, the vias are arranged corresponding to the contact areas; forming a conductive layer on a sidewall of the vias and an outer surface of the substrate; and forming a plurality of pads on the conductive layer. ### Claim 20 (depends on 17) The method for fabricating an image sensor chip package of claim 17, wherein the step of cutting the substrate comprises forming a plurality of trapezoid recesses on the substrate and the spacers. ### Claim 21 (depends on 20) The method for fabricating an image sensor chip package of claim 20, further comprising: forming a plurality of contact areas on the substrate, the contact areas connecting to the image sensor components; forming a conductive layer on the surface of the trapezoid recesses and an outer surface of the substrate, the conductive layer connecting to the contact areas; and forming a plurality of pads on the conductive layer. ### Claim 22 (depends on 21) The method for fabricating an image sensor chip package of claim 21, wherein the stress notches are formed in the trapezoid recesses respectively, and a part of the conductive layer is filled in the stress notches. ### Claim 23 (depends on 16) The method for fabricating an image sensor chip package of claim 16, wherein the step of providing the substrate comprises: providing the substrate; forming a plurality of image sensor components and a plurality of contact areas on the substrate, the contact areas connecting to the image sensor components; forming a plurality of spacers on the substrate for separating the image senor components; and disposing the transparent plate on the spacers, wherein a plurality of chambers are formed between the transparent plate and the substrate, a part of the chambers are placed with the image sensor components, another part of the placed with the contact areas. ### Claim 24 (depends on 23) The method for fabricating an image sensor chip package of claim 23, wherein the stress notches formed on the transparent plate are arranged corresponding to the contact areas.