# US 2014/0191337 A1 · Stacked Half-Bridge Package > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191337 A1 - Document ID: US20140191337A1 - Status: Published application - Kind: A1 - Application number: 14/209,569 - Filed: 2014-03-13 - Published: 2014-07-10 - Earliest claimed: 2011-01-14 - Assignees: International Rectifier Corporation - Applicants: International Rectifier Corporation - Inventors: Eung San Cho; Chuan Cheah; Andrew N. Sawle - Web page: https://patentgrep.com/patent/US20140191337A1 ## CPC - H10W 90/811: {Multiple chips on leadframes} - H10W 70/466: {Tape carriers or flat leads} - H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00} - H10W 72/60: Strap connectors, e.g. thick copper clips for grounding of power devices - H10W 90/00: Package configurations - H10W 72/07336: {Soldering or alloying} - H10W 72/07636: {Soldering or alloying} - H10W 72/07653: {changes in shapes} - H10W 72/5475: {multiple bond wires connected to common bond pads at both ends of the wires} - H10W 72/652: {comprising metals or metalloids, e.g. silver} - H10W 72/871: {Bond wires and strap connectors} - H10W 72/926: {Multiple bond pads having different sizes} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W 90/766: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract According to an exemplary embodiment, a stacked half-bridge package includes a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate for being driven by a driver IC. The stacked half-bridge package also includes a sync transistor having a sync drain for connection to the output terminal, a sync source coupled to a low voltage input, and a sync gate for being driven by the driver IC. A current carrying layer is situated on the sync drain; the control transistor and the sync transistor being stacked on one another, where the current carrying layer provides a high current connection between the sync drain and the control source. ## Claims ### Claim at position 1 1-20. (canceled) ### Claim 21 A stacked half-bridge package comprising: a control transistor having a control drain for connection to a high voltage input, a control source coupled to an output terminal, and a control gate; a sync transistor having a sync drain for connection to said output terminal, a sync source coupled to a low voltage input, and a sync gate; said control and sync transistors being stacked over one another, wherein a current carrying layer provides an electrical connection between said sync drain and said control source. ### Claim 22 (depends on 21) The stacked half-bridge package of claim 21, wherein an output terminal leadframe provides connection for said current carrying layer. ### Claim 23 (depends on 21) The stacked half-bridge package of claim 21, comprising a solderable front metal (SFM) situated on said current carrying layer. ### Claim 24 (depends on 21) The stacked half-bridge package of claim 21, wherein a control drain leadframe provides connection for said control drain. ### Claim 25 (depends on 21) The stacked half-bridge package of claim 21, wherein a conductive source clip provides connection between said sync source and a sync source leadframe. ### Claim 26 (depends on 21) The stacked half-bridge package of claim 21, wherein a conductive source clip comprises a source clip leg that is of a thickness greater than that of said sync transistor. ### Claim 27 (depends on 21) The stacked half-bridge package of claim 21, wherein a conductive source clip comprises a source clip leg that is of a thickness greater than a combined thickness of said sync transistor and said current carrying layer. ### Claim 28 (depends on 21) The stacked half-bridge package of claim 21, wherein a conductive source clip comprises a source clip web that is connected to said sync source and including a source clip leg that is connected to a sync source leadframe. ### Claim 29 (depends on 21) The stacked half-bridge package of claim 21, wherein a conductive source clip is connected to said sync source at a topside of said stacked half-bridge package. ### Claim 30 (depends on 21) The stacked half-bridge package of claim 21, wherein respective bottom surfaces of a sync source leadframe, a control drain leadframe, and an output terminal leadframe are substantially flush with one another. ### Claim 31 (depends on 21) The stacked half-bridge package of claim 21, wherein at least one control gate bondwire provides electrical connection for said control gate. ### Claim 32 (depends on 21) The stacked half-bridge package of claim 21, wherein at least one control gate bondwire provides electrical connection between said control gate and a control gate leadframe. ### Claim 33 (depends on 21) The stacked half-bridge package of claim 21, wherein at least one sync gate bondwire provides electrical connection for said sync gate. ### Claim 34 (depends on 21) The stacked half-bridge package of claim 21, wherein at least one sync gate bondwire provides electrical connection between said sync gate and a sync gate leadframe. ### Claim 35 (depends on 21) The stacked half-bridge package of claim 21, wherein said sync source comprises a plurality of sync source pads. ### Claim 36 (depends on 21) The stacked half-bridge package of claim 21, wherein said control transistor has top and bottom surfaces, said control drain being on said bottom surface and said control source and said control gate being on said top surface. ### Claim 37 (depends on 21) The stacked half-bridge package of claim 21, wherein said sync transistor has top and bottom surfaces, said sync drain being on said bottom surface and said sync source and said sync gate being on said top surface. ### Claim 38 (depends on 21) The stacked half-bridge package of claim 21, wherein respective bottom surfaces of a sync source leadframe, a control drain leadframe, a sync gate leadframe, a control gate leadframe, and an output terminal leadframe are substantially flush with one another. ### Claim 39 (depends on 21) The stacked half-bridge package of claim 21, further comprising an output terminal leadframe that is of a thickness greater than that of a control drain leadframe. ### Claim 40 (depends on 21) The stacked half-bridge package of claim 21, further comprising an output terminal leadframe that is of a thickness greater than a combined thickness of a control drain leadframe and said control transistor.