# US 2014/0191326 A1 · Photonics device and cmos device having a common gate > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0191326 A1 - Document ID: US20140191326A1 - Status: Published application - Kind: A1 - Application number: 14/015,493 - Filed: 2013-08-30 - Published: 2014-07-10 - Earliest claimed: 2013-01-08 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Solomon Assefa; William M. J. Green; Steven M. Shank; Yurii A. Vlasov - Web page: https://patentgrep.com/patent/US20140191326A1 ## CPC - H10D 84/856: {the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS} - H10D 86/01: Manufacture or treatment - H10F 39/10: Integrated devices - H10F 71/1212: {consisting of germanium} - H10D 64/01356: {the insulator being formed after the semiconductor body, the semiconductor being a Group IV material and not being silicon, e.g. Ge, SiGe or SiGeC (H10D64/01364, H10D64/01366 take precedence)} - H10D 84/0135: {Manufacturing their gate conductors} - H10D 84/038: {using silicon technology, e.g. SiGe} - H10D 84/40: characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs - H10D 84/80: characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs (H10D84/40 takes precedence) - Y02E 10/50: Photovoltaic [PV] energy - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION ## Abstract A semiconductor chip having a photonics device and a CMOS device which includes a photonics device portion and a CMOS device portion on a semiconductor chip; a metal or polysilicon gate on the CMOS device portion, the metal or polysilicon gate having a gate extension that extends toward the photonics device portion; a germanium gate on the photonics device portion such that the germanium gate is coplanar with the metal or polysilicon gate, the germanium gate having a gate extension that extends toward the CMOS device portion, the germanium gate extension and metal or polysilicon gate extension joined together to form a common gate; spacers formed on the germanium gate and the metal or polysilicon gate; and nitride encapsulation formed on the germanium gate. ## Claims ### Claim 1 A semiconductor chip having a photonics device and a CMOS device on the same semiconductor chip comprising: a photonics device portion and a CMOS device portion on a semiconductor chip; a metal or polysilicon gate on the CMOS device portion, the metal or polysilicon gate having a gate extension that extends toward the photonics device portion; a germanium gate on the photonics device portion such that the germanium gate is coplanar with the metal or polysilicon gate, the germanium gate having a gate extension that extends toward the CMOS device portion, the germanium gate extension and metal or polysilicon gate extension joined together to form a common gate; spacers formed on the germanium gate and the metal or polysilicon gate; and nitride encapsulation formed on the germanium gate. ### Claim 2 (depends on 1) The semiconductor chip of claim 1 wherein the respective joined gate extensions that form a common gate between the photonics device portion and CMOS device portion are coplanar. ### Claim 3 (depends on 1) The semiconductor chip of claim 1 further comprising a bonding layer between the germanium gate extension and metal or polysilicon gate extension. ### Claim 4 (depends on 3) The semiconductor chip of claim 3 wherein the bonding layer is an oxynitride. ### Claim 5 (depends on 3) The semiconductor chip of claim 3 wherein the bonding layer has a thickness of about 10 angstroms. ### Claim 6 (depends on 1) The semiconductor chip of claim 1 where the semiconductor chip comprises a semiconductor on insulator structure. ### Claim 7 (depends on 1) The semiconductor chip of claim 1 wherein the nitride encapsulation is only formed on the germanium gate. ### Claim 8 (depends on 1) The semiconductor chip of claim 1 wherein the spacers comprise first and second spacers formed on the germanium gate and the metal or polysilicon gate. ### Claim 9 (depends on 1) The semiconductor chip of claim 1 further comprising an isolation region between the photonics device portion and the CMOS device portion such that the common gate is on the isolation region. ### Claim 10 A semiconductor chip having a photonics device and a CMOS device on the same semiconductor chip comprising: a photonics device portion and a CMOS device portion on a semiconductor chip; a metal or polysilicon gate on the CMOS device portion, the metal or polysilicon gate having a gate extension that extends toward the photonics device portion; a germanium gate on the photonics device portion such that the germanium gate is coplanar with the metal or polysilicon gate, the germanium gate having a gate extension that extends toward the CMOS device portion, the germanium gate extension and metal or polysilicon gate extension joined together to form a common gate; nitride encapsulation formed only on the germanium gate; and an isolation region between the photonics device portion and the CMOS device portion such that the common gate is on the isolation region. ### Claim 11 (depends on 10) The semiconductor chip of claim 10 wherein the respective joined gate extensions that form a common gate between the photonics device portion and CMOS device portion are coplanar. ### Claim 12 (depends on 10) The semiconductor chip of claim 10 further comprising a bonding layer between the germanium gate extension and metal or polysilicon gate extension. ### Claim 13 (depends on 12) The semiconductor chip of claim 12 wherein the bonding layer is an oxynitride. ### Claim 14 (depends on 12) The semiconductor chip of claim 12 wherein the bonding layer has a thickness of about 10 angstroms. ### Claim 15 (depends on 10) The semiconductor chip of claim 10 where the semiconductor chip comprises a semiconductor on insulator structure. ### Claim 16 (depends on 10) The semiconductor chip of claim 10 further comprising first and second spacers formed on the germanium gate and the metal or polysilicon gate.