# US 2014/0191313 A1 · Semiconductor device and method of manufacturing the same

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- Number: US 2014/0191313 A1
- Document ID: US20140191313A1
- Status: Published application
- Kind: A1
- Application number: 14/208,911
- Filed: 2014-03-13
- Published: 2014-07-10
- Earliest claimed: 2007-07-27
- Assignees: Seiko Instruments Inc.
- Applicants: Seiko Instruments Inc.
- Inventors: Masayuki HASHITANI
- Web page: https://patentgrep.com/patent/US20140191313A1

## CPC

- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 30/0223: {having source and drain regions or source and drain extensions self-aligned to sides of the gate}
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 30/658: {having trench gate electrodes}
- H10D 62/292: {Non-planar channels of IGFETs (resulting from the gate electrode dispositions, e.g. within trenches H10D64/512)}
- H10D 64/027: {by etching at gate locations}
- H10D 64/519: {characterised by their top-view geometrical layouts}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Provided is a semiconductor device formed with a trench portion for providing a concave portion in a gate width direction and with a gate electrode provided within and on a top surface of the trench portion via a gate insulating film. At least a part of a surface of each of the source region and the drain region is made lower than other parts of the surface by removing a thick oxide film formed in the vicinity of the gate electrode. Making lower the part of the surface of each of the source region and the drain region allows current flowing through a top surface of the concave portion of the gate electrode at high concentration to flow uniformly through the entire trench portion, which increase an effective gate width of the concave portion formed so as to have a varying depth in a gate width direction.

## Claims

### Claim 1

A semiconductor device comprising:
a first conductivity type semiconductor substrate;
a trench portion in the first conductivity type semiconductor substrate, the trench having a side surface and a bottom surface extending in a gate width direction;
a concave surface region spaced away from the trench by a constant distance, such that the concave surface region follows a contour of the side surface of the trench;
a gate electrode within the trench portion and overlying a planar portion of the substrate and spaced apart therefrom by a gate insulating film;
a source region of a second conductivity type and a drain region of the second conductivity type
in the substrate below the concave surface region, such that the source and drain regions are adjacent to the side surface of the trench and sandwich the electrode therebetween below the concave surface region.

### Claim 2

A semiconductor device comprising:
a first conductivity type semiconductor substrate;
linear recesses in the first conductivity type semiconductor substrate;
a source region of a second conductivity type and a drain region of the second conductivity type, spaced apart from each other in the first conductivity type semiconductor substrate below the linear recesses;
a planar portion of the substrate between the source region and the drain region comprising a first channel region;
a trench having a constant depth in the substrate along the planar portion and having a side surface and a bottom surface comprising a second channel region,
wherein the linear recesses are separated from the side surface of the trench by a constant distance, such that the linear recesses follow a contour of the side surface of the trench;
a gate insulating film on a surface of the planar portion and a surface of the trench portion; and
a gate electrode on the gate insulating film,
wherein the source region and the drain region are adjacent to the side surface of the trench.

### Claim at position 3

-8. (canceled)